aboutsummaryrefslogtreecommitdiff
path: root/basys3
Commit message (Collapse)AuthorAge
* clockheavydemon212023-02-23
| | | | interne clcok toegevoegd aan de vga modules. niks is veranderd aan de PLUT want die werkt nog steeds op dezelfde SYSCLK.
* plut,comp en vgaNielsCoding2023-02-23
|
* Merge branch 'dev' of https://github.com/lonkaars/avans-arcade into mergeUnavailableDev2023-02-22
|\
| * format and add apu sources to vivado project filelonkaars2023-02-19
| |
| * Merge branch 'dev' of github.com:lonkaars/avans-arcade into devlonkaars2023-02-19
| |\
| * | finish ppu address decoderlonkaars2023-02-19
| | |
| * | separate constants file for vhdl codelonkaars2023-02-19
| | |
* | | small formatting fixUnavailableDev2023-02-19
| | |
* | | shifted triangle wave 180*UnavailableDev2023-02-19
| | |
* | | polish on APU_N2FUnavailableDev2023-02-19
| | |
* | | apu_LUT_reader made with variable frequencyUnavailableDev2023-02-19
| | |
* | | single frequency implementationUnavailableDev2023-02-19
| |/ |/|
* | apu note 2 freqUnavailableDev2023-02-19
|/
* no clock output while reset high in pceglonkaars2023-02-18
|
* ppu pceg done + ppu top.vhdl donelonkaars2023-02-18
|
* use tabs for indentationlonkaars2023-02-17
|
* separate AUX memory into separate componentlonkaars2023-02-17
|
* safety commit (before remove DI lines)lonkaars2023-02-17
|
* WIP ppu.vhdllonkaars2023-02-17
|
* initial commitlonkaars2023-02-02