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path: root/basys3/basys3.xpr
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* WIP ppu testinglonkaars2023-03-14
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* fix write enable input linelonkaars2023-03-13
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* merge `dev` into `ppu`lonkaars2023-03-13
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| * top.vhdllonkaars2023-03-10
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* | fix display upscaler (output working!)lonkaars2023-03-13
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* | upscaler test with coe initialized romlonkaars2023-03-12
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* | WIP dispctl (valid VGA signal)lonkaars2023-03-12
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* | ppu_dispctl test for valid VGA signal using DMT 640x480 @ 60lonkaars2023-03-08
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* | ppu dispctl WIP (shift XY output 2 scanlines and send THVBLANK)lonkaars2023-03-08
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* | more WIP dispctllonkaars2023-03-08
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* | WIP dispctllonkaars2023-03-08
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* | scaffold vga display controller and upscalerlonkaars2023-03-08
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* | fix multiple driver net errorslonkaars2023-03-04
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* | foreground sprite optimization (untested) donelonkaars2023-03-04
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* | WIP fg sprite optimilizationlonkaars2023-03-03
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* | WIP addr_dec timing check + ppu address bus fixlonkaars2023-03-01
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* merge #16lonkaars2023-02-24
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* | ppu foreground sprite working and ~50% testedlonkaars2023-02-23
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* | WIP ppu fg sprite fetch logiclonkaars2023-02-22
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* | WIP foreground sprite + `std_logic_vector` -> `unsigned` messlonkaars2023-02-21
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* | WIP ppu foreground sprite componentlonkaars2023-02-21
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* | background sprite component done, tested, and working without latcheslonkaars2023-02-21
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* | PPU debugged and working (but with unwanted latches)lonkaars2023-02-21
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* | PPU background sprite component done (but unverified)lonkaars2023-02-20
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* | update TMM data width + update memory map (WIP ppu_sprite_bg)lonkaars2023-02-20
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* | PPU AUX memory finished and testedlonkaars2023-02-20
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* | exposed ram module implementedlonkaars2023-02-20
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* | rename .vhdl to .vhdlonkaars2023-02-20
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* format and add apu sources to vivado project filelonkaars2023-02-19
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* finish ppu address decoderlonkaars2023-02-19
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* no clock output while reset high in pceglonkaars2023-02-18
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* ppu pceg done + ppu top.vhdl donelonkaars2023-02-18
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* WIP ppu.vhdllonkaars2023-02-17
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* initial commitlonkaars2023-02-02