Commit message (Expand) | Author | Age | |
---|---|---|---|
* | WIP foreground sprite + `std_logic_vector` -> `unsigned` mess | lonkaars | 2023-02-21 |
* | WIP ppu foreground sprite component | lonkaars | 2023-02-21 |
* | background sprite component done, tested, and working without latches | lonkaars | 2023-02-21 |
* | PPU debugged and working (but with unwanted latches) | lonkaars | 2023-02-21 |
* | PPU background sprite component done (but unverified) | lonkaars | 2023-02-20 |
* | update TMM data width + update memory map (WIP ppu_sprite_bg) | lonkaars | 2023-02-20 |
* | PPU AUX memory finished and tested | lonkaars | 2023-02-20 |
* | exposed ram module implemented | lonkaars | 2023-02-20 |
* | rename .vhdl to .vhd | lonkaars | 2023-02-20 |
* | format and add apu sources to vivado project file | lonkaars | 2023-02-19 |
* | finish ppu address decoder | lonkaars | 2023-02-19 |
* | no clock output while reset high in pceg | lonkaars | 2023-02-18 |
* | ppu pceg done + ppu top.vhdl done | lonkaars | 2023-02-18 |
* | WIP ppu.vhdl | lonkaars | 2023-02-17 |
* | initial commit | lonkaars | 2023-02-02 |