diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/demo.c | 102 | ||||
| -rw-r--r-- | src/ds.c | 2 | ||||
| -rw-r--r-- | src/main.c | 28 | ||||
| -rw-r--r-- | src/ppu/internals.c | 18 | ||||
| -rw-r--r-- | src/ppu/stm.c | 3 | ||||
| -rw-r--r-- | src/ppusim/mem.c | 56 | ||||
| -rw-r--r-- | src/ppusim/sim.c | 2 | ||||
| -rw-r--r-- | src/ppusim/work.c | 6 | ||||
| -rw-r--r-- | src/stm32/consts.h | 11 | ||||
| -rw-r--r-- | src/stm32/main.c | 2 | ||||
| -rw-r--r-- | src/stm32/setup.c | 76 | ||||
| -rw-r--r-- | src/stm32/setup.h | 4 |
12 files changed, 272 insertions, 38 deletions
@@ -2,6 +2,8 @@ #include "demo.h" #include "ppu/ppu.h" +#include "input.h" +#include "ppu/internals.h" #define HH_DEMO_BALL_COUNT 5 hh_s_ppu_loc_fam_entry g_hh_demo_balls[HH_DEMO_BALL_COUNT]; @@ -48,4 +50,104 @@ void hh_demo_loop(unsigned long frame) { g_hh_demo_balls[i].position_y = HH_PPU_SCREEN_HEIGHT/2 - HH_PPU_SPRITE_HEIGHT/2 + (int)(30 * (double)sin((2*(double)frame / 10) + (double)i * 12)); hh_ppu_update_foreground(i+16, g_hh_demo_balls[i]); } + + return; + /* + hh_ppu_update_foreground(32, (hh_s_ppu_loc_fam_entry) { + .horizontal_flip = false, + .vertical_flip = false, + .palette_index = g_hh_controller_p1.dpad_up * 2, + .tilemap_index = 0, + .position_x = 0, + .position_y = 0, + }); + hh_ppu_update_foreground(33, (hh_s_ppu_loc_fam_entry) { + .horizontal_flip = false, + .vertical_flip = false, + .palette_index = g_hh_controller_p1.dpad_down * 2, + .tilemap_index = 0, + .position_x = 16, + .position_y = 0, + }); + hh_ppu_update_foreground(34, (hh_s_ppu_loc_fam_entry) { + .horizontal_flip = false, + .vertical_flip = false, + .palette_index = g_hh_controller_p1.dpad_left * 2, + .tilemap_index = 0, + .position_x = 32, + .position_y = 0, + }); + hh_ppu_update_foreground(35, (hh_s_ppu_loc_fam_entry) { + .horizontal_flip = false, + .vertical_flip = false, + .palette_index = g_hh_controller_p1.dpad_right * 2, + .tilemap_index = 0, + .position_x = 48, + .position_y = 0, + }); + hh_ppu_update_foreground(36, (hh_s_ppu_loc_fam_entry) { + .horizontal_flip = false, + .vertical_flip = false, + .palette_index = g_hh_controller_p1.button_primary * 2, + .tilemap_index = 0, + .position_x = 64, + .position_y = 0, + }); + hh_ppu_update_foreground(37, (hh_s_ppu_loc_fam_entry) { + .horizontal_flip = false, + .vertical_flip = false, + .palette_index = g_hh_controller_p1.button_secondary * 2, + .tilemap_index = 0, + .position_x = 80, + .position_y = 0, + }); + hh_ppu_update_foreground(40, (hh_s_ppu_loc_fam_entry) { + .horizontal_flip = false, + .vertical_flip = false, + .palette_index = g_hh_controller_p2.dpad_up * 2, + .tilemap_index = 0, + .position_x = 0, + .position_y = 16, + }); + hh_ppu_update_foreground(41, (hh_s_ppu_loc_fam_entry) { + .horizontal_flip = false, + .vertical_flip = false, + .palette_index = g_hh_controller_p2.dpad_down * 2, + .tilemap_index = 0, + .position_x = 16, + .position_y = 16, + }); + hh_ppu_update_foreground(42, (hh_s_ppu_loc_fam_entry) { + .horizontal_flip = false, + .vertical_flip = false, + .palette_index = g_hh_controller_p2.dpad_left * 2, + .tilemap_index = 0, + .position_x = 32, + .position_y = 16, + }); + hh_ppu_update_foreground(43, (hh_s_ppu_loc_fam_entry) { + .horizontal_flip = false, + .vertical_flip = false, + .palette_index = g_hh_controller_p2.dpad_right * 2, + .tilemap_index = 0, + .position_x = 48, + .position_y = 16, + }); + hh_ppu_update_foreground(44, (hh_s_ppu_loc_fam_entry) { + .horizontal_flip = false, + .vertical_flip = false, + .palette_index = g_hh_controller_p2.button_primary * 2, + .tilemap_index = 0, + .position_x = 64, + .position_y = 16, + }); + hh_ppu_update_foreground(45, (hh_s_ppu_loc_fam_entry) { + .horizontal_flip = false, + .vertical_flip = false, + .palette_index = g_hh_controller_p2.button_secondary * 2, + .tilemap_index = 0, + .position_x = 80, + .position_y = 16, + }); + */ } @@ -4,7 +4,7 @@ void hh_setup() { hh_ppu_init(); - hh_demo_setup(); + // hh_demo_setup(); } void hh_exit() { @@ -3,6 +3,13 @@ #include "main.h" #include "demo.h" #include "ppu/ppu.h" +#include "input.h" + +#ifdef HH_TARGET_DESKTOP +#include <stdio.h> +#include "../test/ppu-stm-integration-demo/data.h" +#include "ppu/internals.h" +#endif bool g_hh_run = true; volatile unsigned long g_hh_vcount; @@ -10,8 +17,27 @@ volatile unsigned short g_hh_hcount; void hh_ppu_vblank_interrupt() { static unsigned long frame = 0; - hh_demo_loop(frame++); + static bool done = false; +#ifdef HH_TARGET_STM32 hh_ppu_flush(); + hh_input_read(); + hh_demo_loop(frame); +#endif +#ifdef HH_TARGET_DESKTOP + //hh_ppu_vram_dwrite((uint8_t*) HH_PPUINTDEMO_ARR, HH_PPUINTDEMO_LENGTH); + for (unsigned int limit = 0; limit < 1000; limit++) { + if (frame * 4 > HH_PPUINTDEMO_LENGTH) { + if (!done) printf("done\n"); + done = true; + return; + } + hh_ppu_vram_dwrite((uint8_t*) HH_PPUINTDEMO_ARR + frame * 4, 4); + uint8_t* d = HH_PPUINTDEMO_ARR + frame * 4; + if (d[0] == 0xff && d[1] == 0xff && d[2] == 0xff && d[3] == 0xff) break; // run all commands until flush + else frame++; + } +#endif + frame++; } int main() { diff --git a/src/ppu/internals.c b/src/ppu/internals.c index 2d90665..7fd2eb9 100644 --- a/src/ppu/internals.c +++ b/src/ppu/internals.c @@ -4,8 +4,9 @@ #include "ppu/internals.h" #include "ppu/types.h" -uint8_t g_hh_ppu_vram_buffer[HH_PPU_COMMAND_BUFFER_SIZE * 2] = { 0 }; -uint8_t* g_hh_ppu_vram_buffer_ptr = g_hh_ppu_vram_buffer; +bool g_hh_ppu_vram_buffer_swap = false; +uint8_t g_hh_ppu_vram_buffer_raw[HH_PPU_COMMAND_BUFFER_SIZE * 2] = { 0 }; +uint8_t* g_hh_ppu_vram_buffer_ptr = g_hh_ppu_vram_buffer_raw; size_t g_hh_ppu_vram_buffer_size = 0; bool hh_ppu_vram_valid_address(hh_ppu_addr_t addr) { @@ -96,19 +97,18 @@ hh_s_ppu_vram_data hh_ppu_2nat_color(hh_ppu_rgb_color_t rgb) { void hh_ppu_vram_buffer(uint8_t data[4]) { size_t head = g_hh_ppu_vram_buffer_size; - g_hh_ppu_vram_buffer[head+0] = data[0]; - g_hh_ppu_vram_buffer[head+1] = data[1]; - g_hh_ppu_vram_buffer[head+2] = data[2]; - g_hh_ppu_vram_buffer[head+3] = data[3]; + g_hh_ppu_vram_buffer_ptr[head+0] = data[0]; // NOTE: this only works because sizeof(buffer) is divisible by 4 + g_hh_ppu_vram_buffer_ptr[head+1] = data[1]; + g_hh_ppu_vram_buffer_ptr[head+2] = data[2]; + g_hh_ppu_vram_buffer_ptr[head+3] = data[3]; g_hh_ppu_vram_buffer_size += 4; } void hh_ppu_vram_flush() { - static bool buffer_swap = false; - buffer_swap = !buffer_swap; hh_ppu_vram_buffer((uint8_t[4]){ 0xff, 0xff, 0xff, 0xff }); hh_ppu_vram_dwrite(g_hh_ppu_vram_buffer_ptr, g_hh_ppu_vram_buffer_size); g_hh_ppu_vram_buffer_size = 0; - g_hh_ppu_vram_buffer_ptr = g_hh_ppu_vram_buffer + (buffer_swap * HH_PPU_COMMAND_BUFFER_SIZE); + g_hh_ppu_vram_buffer_ptr = g_hh_ppu_vram_buffer_raw + g_hh_ppu_vram_buffer_swap * HH_PPU_COMMAND_BUFFER_SIZE; + g_hh_ppu_vram_buffer_swap = !g_hh_ppu_vram_buffer_swap; } diff --git a/src/ppu/stm.c b/src/ppu/stm.c index 6bd9f66..ddd62b9 100644 --- a/src/ppu/stm.c +++ b/src/ppu/stm.c @@ -13,7 +13,6 @@ void hh_ppu_deinit() {} void hh_ppu_vram_dwrite(uint8_t* data, size_t size) { HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_SET); HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_RESET); - HAL_SPI_Transmit_IT(&hspi1, data, size); - // HAL_SPI_Transmit_IT(&hspi1, (uint8_t[4]){ 0xff }, 4); + HAL_SPI_Transmit_DMA(&hspi1, data, size); } diff --git a/src/ppusim/mem.c b/src/ppusim/mem.c index f536727..20464cb 100644 --- a/src/ppusim/mem.c +++ b/src/ppusim/mem.c @@ -6,12 +6,66 @@ hh_ppu_data_t *g_hh_ppusim_vram = NULL; +#define HH_DBG_PPUSIM_PRINT_MEM + +static void hh_ppu_dbg_memprint(hh_ppu_addr_t addr, hh_ppu_data_t data) { + int area_i = ((addr >= HH_PPU_VRAM_TMM_OFFSET) && (addr < (HH_PPU_VRAM_TMM_OFFSET + HH_PPU_VRAM_TMM_SIZE))) ? 0 : + ((addr >= HH_PPU_VRAM_BAM_OFFSET) && (addr < (HH_PPU_VRAM_BAM_OFFSET + HH_PPU_VRAM_BAM_SIZE))) ? 1 : + ((addr >= HH_PPU_VRAM_FAM_OFFSET) && (addr < (HH_PPU_VRAM_FAM_OFFSET + HH_PPU_VRAM_FAM_SIZE))) ? 2 : + ((addr >= HH_PPU_VRAM_PAL_OFFSET) && (addr < (HH_PPU_VRAM_PAL_OFFSET + HH_PPU_VRAM_PAL_SIZE))) ? 3 : + ((addr >= HH_PPU_VRAM_AUX_OFFSET) && (addr < (HH_PPU_VRAM_AUX_OFFSET + HH_PPU_VRAM_AUX_SIZE))) ? 4 : -1; + char* area_str = (area_i == 0) ? "TMM" : + (area_i == 1) ? "BAM" : + (area_i == 2) ? "FAM" : + (area_i == 3) ? "PAL" : + (area_i == 4) ? "AUX" : "???"; + printf("[%s] %04x: %04x", area_str, addr, data); + + switch (area_i) { + case 0: { + unsigned short i = addr - HH_PPU_VRAM_TMM_OFFSET; + printf(" (tile[%04i] data)", i / 52); + break; + } + case 1: { + unsigned short i = addr - HH_PPU_VRAM_BAM_OFFSET; + printf(" (bam tile [%02i, %02i] attributes)", i % 40, i / 40); + break; + } + case 2: { + unsigned short i = addr - HH_PPU_VRAM_FAM_OFFSET; + printf(" (fam[%03i] attributes)", i/2); + break; + } + case 3: { + unsigned short i = addr - HH_PPU_VRAM_PAL_OFFSET; + printf(" (pal[%02i] = #%x%x%x%x%x%x)", i, (data >> 0) & 0xf, (data >> 0) & 0xf, + (data >> 4) & 0xf, (data >> 4) & 0xf, + (data >> 8) & 0xf, (data >> 8) & 0xf); + break; + } + case 4: { + + if (addr == 0xde01 && ((data & (1 << 2)) > 0)) printf(" (+sysreset)"); + break; + } + + default: { break; } + } + + if (addr == 0xffff && data == 0xffff) printf(" (flush)"); + + printf("\n"); +} + void hh_ppu_vram_dwrite(uint8_t* data, size_t size) { for (size_t i = 0; i < size; i += 4) { if (i+4 > size) break; hh_ppu_addr_t ppu_addr = (data[i+0] << 8) | (data[i+1] << 0); hh_ppu_data_t ppu_data = (data[i+2] << 8) | (data[i+3] << 0); - // printf("%04x: %04x\n", ppu_addr, ppu_data); +#ifdef HH_DBG_PPUSIM_PRINT_MEM + hh_ppu_dbg_memprint(ppu_addr, ppu_data); +#endif if (!hh_ppu_vram_valid_address(ppu_addr)) continue; g_hh_ppusim_vram[ppu_addr] = ppu_data; } diff --git a/src/ppusim/sim.c b/src/ppusim/sim.c index be5fbeb..14d79a7 100644 --- a/src/ppusim/sim.c +++ b/src/ppusim/sim.c @@ -24,7 +24,7 @@ void hh_ppu_init() { g_hh_ppusim_threads = malloc(sizeof(pthread_t) * g_hh_ppusim_core_count); g_hh_ppusim_vram = malloc(sizeof(hh_ppu_data_t) * 0xffff); - memset(g_hh_ppusim_vram, 0x0000, 0xffff); + memset(g_hh_ppusim_vram, 0x0000, 0xffff * sizeof(hh_ppu_data_t)); } void hh_ppu_load_tilemap() { diff --git a/src/ppusim/work.c b/src/ppusim/work.c index 96d15aa..977b2c4 100644 --- a/src/ppusim/work.c +++ b/src/ppusim/work.c @@ -6,6 +6,8 @@ #include "ppusim/pixel.h" #include "ppusim/sim.h" #include "ppusim/work.h" +#include "ppusim/mem.h" +#include "ppu/internals.h" pthread_t *g_hh_ppusim_threads; unsigned g_hh_ppusim_core_count; @@ -23,6 +25,10 @@ void *hh_ppusim_draw_thread(void *arg) { } void hh_ppusim_draw_frame(SDL_Renderer *renderer) { + hh_ppu_data_t *aux = &g_hh_ppusim_vram[HH_PPU_VRAM_AUX_OFFSET]; + bool reset = HH_RESIZE(aux[1], 2, 2); + if (reset) memset(g_hh_ppusim_vram, 0x0000, 0xffff * sizeof(hh_ppu_data_t)); + for (unsigned core = 0; core < g_hh_ppusim_core_count; core++) pthread_create(&g_hh_ppusim_threads[core], NULL, hh_ppusim_draw_thread, (void *)(unsigned long)core); for (unsigned core = 0; core < g_hh_ppusim_core_count; core++) pthread_join(g_hh_ppusim_threads[core], NULL); diff --git a/src/stm32/consts.h b/src/stm32/consts.h index 447e36e..16d8da2 100644 --- a/src/stm32/consts.h +++ b/src/stm32/consts.h @@ -3,12 +3,19 @@ #include <stm32f091xc.h> // ../../docs/hardware/pinout.md -#define HH_IO_SPI_PORT GPIOA -#define HH_IO_SPI_PINS (GPIO_PIN_5 | GPIO_PIN_7) +#define HH_IO_SPI_MOSI_PORT GPIOA +#define HH_IO_SPI_MOSI_PIN GPIO_PIN_7 +#define HH_IO_SPI_MISO_PORT GPIOA +#define HH_IO_SPI_MISO_PIN GPIO_PIN_6 +#define HH_IO_SPI_CLK_PORT GPIOA +#define HH_IO_SPI_CLK_PIN GPIO_PIN_5 #define HH_IO_SPI_SR_PORT GPIOA #define HH_IO_SPI_SR_PIN GPIO_PIN_9 +#define HH_IO_SPI_PORT GPIOA +#define HH_IO_SPI_PINS (HH_IO_SPI_CLK_PIN | HH_IO_SPI_MOSI_PIN | HH_IO_SPI_MISO_PIN) + #define HH_IO_PPU_HBLANK_PORT GPIOA #define HH_IO_PPU_HBLANK_PIN GPIO_PIN_8 #define HH_IO_PPU_VBLANK_PORT GPIOC diff --git a/src/stm32/main.c b/src/stm32/main.c index b7b4604..181657c 100644 --- a/src/stm32/main.c +++ b/src/stm32/main.c @@ -5,5 +5,5 @@ void hh_ppu_load_tilemap() {} void hh_loop() { - while(1); + while(g_hh_run); } diff --git a/src/stm32/setup.c b/src/stm32/setup.c index dc8d23e..d15c643 100644 --- a/src/stm32/setup.c +++ b/src/stm32/setup.c @@ -11,6 +11,8 @@ #include "ppu/ppu.h" #include "stm32/consts.h" +bool g_hh_first_flush_done = false; + UART_HandleTypeDef huart2 = { .Instance = USART2, .Init.BaudRate = 115200, @@ -24,18 +26,10 @@ UART_HandleTypeDef huart2 = { .AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT, }; -GPIO_InitTypeDef spi_gpio = { - .Pin = HH_IO_SPI_PINS, - .Mode = GPIO_MODE_AF_PP, - .Pull = GPIO_NOPULL, - .Speed = GPIO_SPEED_FREQ_HIGH, - .Alternate = GPIO_AF0_SPI1, -}; - SPI_HandleTypeDef hspi1 = { .Instance = SPI1, .Init.Mode = SPI_MODE_MASTER, - .Init.Direction = SPI_DIRECTION_1LINE, + .Init.Direction = SPI_DIRECTION_2LINES, .Init.DataSize = SPI_DATASIZE_8BIT, .Init.CLKPolarity = SPI_POLARITY_LOW, .Init.CLKPhase = SPI_PHASE_1EDGE, @@ -49,6 +43,17 @@ SPI_HandleTypeDef hspi1 = { .Init.NSSPMode = SPI_NSS_PULSE_DISABLE, }; +DMA_HandleTypeDef hdma_spi1_tx = { + .Instance = DMA1_Channel3, + .Init.Direction = DMA_MEMORY_TO_PERIPH, + .Init.PeriphInc = DMA_PINC_DISABLE, + .Init.MemInc = DMA_MINC_ENABLE, + .Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE, + .Init.MemDataAlignment = DMA_MDATAALIGN_BYTE, + .Init.Mode = DMA_NORMAL, + .Init.Priority = DMA_PRIORITY_HIGH, +}; + TIM_HandleTypeDef htim3 = { .Instance = TIM3, .Init.Prescaler = 7999, @@ -64,6 +69,8 @@ static void hh_io_usart2_setup(); static void hh_io_gpio_setup(); static void hh_io_clock_setup(); static void hh_io_setup_error_handler(); +static void hh_interrupt_setup(); +static void hh_io_dma_setup(); void hh_setup() { HAL_Init(); @@ -71,11 +78,14 @@ void hh_setup() { hh_io_clock_setup(); hh_io_usart2_setup(); hh_io_gpio_setup(); + hh_io_dma_setup(); hh_io_spi_setup(); hh_io_tim_setup(); hh_ppu_init(); hh_demo_setup(); + + hh_ppu_flush(); } void hh_exit() { @@ -84,6 +94,12 @@ void hh_exit() { HAL_DeInit(); } +void hh_io_dma_setup() { + __HAL_RCC_DMA1_CLK_ENABLE(); + HAL_NVIC_SetPriority(DMA1_Ch2_3_DMA2_Ch1_2_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA1_Ch2_3_DMA2_Ch1_2_IRQn); +} + void hh_io_clock_setup() { if (HAL_OK != HAL_RCC_OscConfig(&(RCC_OscInitTypeDef){ .OscillatorType = RCC_OSCILLATORTYPE_HSI, @@ -142,9 +158,9 @@ static void gpio_init(GPIO_TypeDef* port, uint16_t pin, uint32_t mode, uint32_t } void hh_io_gpio_setup() { - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); // SPI reset line gpio_init(HH_IO_SPI_SR_PORT, HH_IO_SPI_SR_PIN, GPIO_MODE_OUTPUT_PP, GPIO_NOPULL); @@ -173,37 +189,49 @@ void hh_io_gpio_setup() { } void HAL_MspInit() { - __HAL_RCC_SYSCFG_CLK_ENABLE(); - __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); HAL_NVIC_SetPriority(PendSV_IRQn, 3, 0); } void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { - if(hspi->Instance != SPI1) return; + if(hspi->Instance != SPI1) return; __HAL_RCC_SPI1_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); - HAL_GPIO_Init(HH_IO_SPI_PORT, &spi_gpio); + HAL_GPIO_Init(HH_IO_SPI_PORT, &(GPIO_InitTypeDef) { + .Pin = HH_IO_SPI_PINS, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_PULLDOWN, + .Speed = GPIO_SPEED_FREQ_HIGH, + .Alternate = GPIO_AF0_SPI1, + }); + + if (HAL_OK != HAL_DMA_Init(&hdma_spi1_tx)) + return hh_io_setup_error_handler(); + __HAL_DMA1_REMAP(HAL_DMA1_CH3_SPI1_TX); + __HAL_LINKDMA(hspi, hdmatx, hdma_spi1_tx); } void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) { - if(hspi->Instance != SPI1) return; + if(hspi->Instance != SPI1) return; __HAL_RCC_SPI1_CLK_DISABLE(); __HAL_RCC_GPIOA_CLK_DISABLE(); HAL_GPIO_DeInit(HH_IO_SPI_PORT, HH_IO_SPI_PINS); + HAL_DMA_DeInit(hspi->hdmatx); } void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { - if(htim_base->Instance != TIM3) return; + if(htim_base->Instance != TIM3) return; __HAL_RCC_TIM3_CLK_ENABLE(); } void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) { - if(htim_base->Instance != TIM3) return; + if(htim_base->Instance != TIM3) return; __HAL_RCC_TIM3_CLK_DISABLE(); } @@ -229,6 +257,7 @@ void EXTI4_15_IRQHandler() { } void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { + if (!g_hh_first_flush_done) return; if (GPIO_Pin == HH_IO_PPU_HBLANK_PIN) { g_hh_hcount++; } @@ -238,3 +267,12 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { hh_ppu_vblank_interrupt(); } } + +void DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler() { + HAL_DMA_IRQHandler(&hdma_spi1_tx); +} + +void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef* hspi) { + if(hspi->Instance != SPI1) return; + g_hh_first_flush_done = true; +} diff --git a/src/stm32/setup.h b/src/stm32/setup.h index b9432dc..f583d20 100644 --- a/src/stm32/setup.h +++ b/src/stm32/setup.h @@ -4,11 +4,12 @@ #include <stm32f0xx_hal_uart.h> #include <stm32f0xx_hal_tim.h> #include <stm32f0xx_hal_gpio.h> +#include <stm32f0xx_hal_dma.h> extern UART_HandleTypeDef huart2; // NOLINT -extern GPIO_InitTypeDef spi_gpio; // NOLINT extern SPI_HandleTypeDef hspi1; // NOLINT extern TIM_HandleTypeDef htim3; // NOLINT +extern DMA_HandleTypeDef hdma_spi1_tx; // NOLINT // required HAL setup functions void HAL_MspInit(); // NOLINT @@ -21,3 +22,4 @@ void HardFault_Handler(); // NOLINT void SysTick_Handler(); // NOLINT void EXTI4_15_IRQHandler(); // NOLINT void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin); // NOLINT +void DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler(); // NOLINT |