diff options
Diffstat (limited to 'basys3/basys3.xpr')
| -rw-r--r-- | basys3/basys3.xpr | 34 |
1 files changed, 18 insertions, 16 deletions
diff --git a/basys3/basys3.xpr b/basys3/basys3.xpr index 90e7823..8dcc698 100644 --- a/basys3/basys3.xpr +++ b/basys3/basys3.xpr @@ -61,20 +61,20 @@ <Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/> <Option Name="EnableBDX" Val="FALSE"/> <Option Name="DSABoardId" Val="basys3"/> - <Option Name="WTXSimLaunchSim" Val="21"/> + <Option Name="WTXSimLaunchSim" Val="27"/> <Option Name="WTModelSimLaunchSim" Val="0"/> <Option Name="WTQuestaLaunchSim" Val="0"/> <Option Name="WTIesLaunchSim" Val="0"/> <Option Name="WTVcsLaunchSim" Val="0"/> <Option Name="WTRivieraLaunchSim" Val="0"/> <Option Name="WTActivehdlLaunchSim" Val="0"/> - <Option Name="WTXSimExportSim" Val="3"/> - <Option Name="WTModelSimExportSim" Val="3"/> - <Option Name="WTQuestaExportSim" Val="3"/> + <Option Name="WTXSimExportSim" Val="4"/> + <Option Name="WTModelSimExportSim" Val="4"/> + <Option Name="WTQuestaExportSim" Val="4"/> <Option Name="WTIesExportSim" Val="0"/> - <Option Name="WTVcsExportSim" Val="3"/> - <Option Name="WTRivieraExportSim" Val="3"/> - <Option Name="WTActivehdlExportSim" Val="3"/> + <Option Name="WTVcsExportSim" Val="4"/> + <Option Name="WTRivieraExportSim" Val="4"/> + <Option Name="WTActivehdlExportSim" Val="4"/> <Option Name="GenerateIPUpgradeLog" Val="TRUE"/> <Option Name="XSimRadix" Val="hex"/> <Option Name="XSimTimeUnit" Val="ns"/> @@ -148,9 +148,15 @@ <Attr Name="UsedIn" Val="simulation"/> </FileInfo> </File> + <File Path="$PSRCDIR/ppu_sprite_bg.vhd"> + <FileInfo> + <Attr Name="UsedIn" Val="synthesis"/> + <Attr Name="UsedIn" Val="simulation"/> + </FileInfo> + </File> <Config> <Option Name="DesignMode" Val="RTL"/> - <Option Name="TopModule" Val="ppu"/> + <Option Name="TopModule" Val="ppu_sprite_bg"/> <Option Name="dataflowViewerSettings" Val="min_width=16"/> </Config> </FileSet> @@ -163,7 +169,7 @@ <FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1" RelGenDir="$PGENDIR/sim_1"> <Filter Type="Srcs"/> <File Path="$PSRCDIR/ppu_addr_dec_tb.vhd"> - <FileInfo SFType="VHDL2008"> + <FileInfo> <Attr Name="UsedIn" Val="synthesis"/> <Attr Name="UsedIn" Val="simulation"/> </FileInfo> @@ -201,7 +207,7 @@ </File> <Config> <Option Name="DesignMode" Val="RTL"/> - <Option Name="TopModule" Val="ppu_aux_tb"/> + <Option Name="TopModule" Val="ppu_addr_dec_tb"/> <Option Name="TopLib" Val="xil_defaultlib"/> <Option Name="TransportPathDelay" Val="0"/> <Option Name="TransportIntDelay" Val="0"/> @@ -270,9 +276,7 @@ <Runs Version="1" Minor="19"> <Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7a35tcpg236-1" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="true" WriteIncrSynthDcp="false" State="current" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_1"> <Strategy Version="1" Minor="2"> - <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022"> - <Desc>Vivado Synthesis Defaults</Desc> - </StratHandle> + <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022"/> <Step Id="synth_design"/> </Strategy> <ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2022"/> @@ -301,9 +305,7 @@ </Run> <Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7a35tcpg236-1" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1"> <Strategy Version="1" Minor="2"> - <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2022"> - <Desc>Default settings for Implementation.</Desc> - </StratHandle> + <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2022"/> <Step Id="init_design"/> <Step Id="opt_design"/> <Step Id="power_opt_design"/> |