1 files changed, 47 insertions, 0 deletions
diff --git a/basys3/basys3.srcs/spi_tb.vhd.m4 b/basys3/basys3.srcs/spi_tb.vhd.m4
new file mode 100644
index 0000000..cf76b2c
--- /dev/null
+++ b/basys3/basys3.srcs/spi_tb.vhd.m4
@@ -0,0 +1,47 @@
+-- vim: ft=vhdl
+library ieee;
+library unisim;
+
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+use unisim.vcomponents.all;
+use work.ppu_consts.all;
+
+entity spi_tb is
+end spi_tb;
+
+architecture behavioral of spi_tb is
+	signal SYSCLK : std_logic := '0';
+	signal SPI_CLK : std_logic := '0';
+	signal SPI_DATA : std_logic := '0';
+	signal RESET : std_logic := '0';
+begin
+	uut : entity work.spi port map(
+		SYSCLK => SYSCLK,
+		RESET => RESET,
+		DO => open,
+		DI => SPI_DATA,
+		DCK => SPI_CLK,
+		WEN => open);
+
+	process
+	begin
+		while true loop
+			wait for 5 ns;
+			SYSCLK <= '1';
+			wait for 5 ns;
+			SYSCLK <= '0';
+		end loop;
+		wait; -- stop for simulator
+	end process;
+
+	process
+	begin
+		-- undivert(`test-background-color-spi.tb.vhd') -- m4 macro expansion (see makefile)
+
+		RESET <= '1';
+		wait for 50 ns;
+		RESET <= '0';
+		wait; -- stop for simulator
+	end process;
+end;