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Diffstat (limited to 'basys3/basys3.srcs/ppu_dispctl_demo_top.vhd')
-rw-r--r--basys3/basys3.srcs/ppu_dispctl_demo_top.vhd4
1 files changed, 2 insertions, 2 deletions
diff --git a/basys3/basys3.srcs/ppu_dispctl_demo_top.vhd b/basys3/basys3.srcs/ppu_dispctl_demo_top.vhd
index c4fa6b8..b8df3c0 100644
--- a/basys3/basys3.srcs/ppu_dispctl_demo_top.vhd
+++ b/basys3/basys3.srcs/ppu_dispctl_demo_top.vhd
@@ -13,7 +13,7 @@ end ppu_dispctl_demo;
architecture Behavioral of ppu_dispctl_demo is
component ppu_dispctl port( -- display controller
- CLK : in std_logic; -- system clock
+ SYSCLK : in std_logic; -- system clock
RESET : in std_logic;
X : out std_logic_vector(PPU_POS_H_WIDTH-1 downto 0); -- tiny screen pixel x
@@ -27,7 +27,7 @@ architecture Behavioral of ppu_dispctl_demo is
end component;
begin
display_controller : component ppu_dispctl port map(
- CLK => CLK100,
+ SYSCLK => CLK100,
RESET => RESET,
PREADY => '1',
X => open,