diff options
Diffstat (limited to 'basys3/basys3.srcs/ppu_comp_tb.vhd')
-rw-r--r-- | basys3/basys3.srcs/ppu_comp_tb.vhd | 60 |
1 files changed, 28 insertions, 32 deletions
diff --git a/basys3/basys3.srcs/ppu_comp_tb.vhd b/basys3/basys3.srcs/ppu_comp_tb.vhd index e8f6893..be4c2e3 100644 --- a/basys3/basys3.srcs/ppu_comp_tb.vhd +++ b/basys3/basys3.srcs/ppu_comp_tb.vhd @@ -8,37 +8,33 @@ entity ppu_comp_tb is end ppu_comp_tb; architecture behavioral of ppu_comp_tb is -COMPONENT ppu_comp - port ( - FG_HIT: in std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0); - BG_EN: out std_logic; - FG_EN: out std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0)); -end component; - -signal FG_HIT: std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0) := (others => '0'); -signal BG_EN: std_logic := '0'; -signal FG_EN: std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0) := (others => '0'); + component ppu_comp port ( + FG_HIT : in std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0); + BG_EN : out std_logic; + FG_EN : out std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0)); + end component; + signal FG_HIT : std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0) := (others => '0'); + signal BG_EN : std_logic := '0'; + signal FG_EN : std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0) := (others => '0'); begin -UUT : ppu_comp port map ( -FG_HIT => FG_HIT, -BG_EN => BG_EN, -FG_EN => FG_EN -); - TB : PROCESS - BEGIN - FG_HIT <= (OTHERS => '0'); - wait for 1 ps; - FG_HIT(6) <= '1'; - FG_HIT(5) <= '1'; - FG_HIT(100) <= '1'; - wait for 1 ps; - - FG_HIT(0) <= '1'; - wait for 1 ps; - FG_HIT <= (OTHERS => '0'); - wait for 1 ps; - - - wait; - END PROCESS; + uut : ppu_comp port map ( + FG_HIT => FG_HIT, + BG_EN => BG_EN, + FG_EN => FG_EN + ); + tb : process + begin + FG_HIT <= (others => '0'); + wait for 1 ps; + FG_HIT(6) <= '1'; + FG_HIT(5) <= '1'; + FG_HIT(100) <= '1'; + wait for 1 ps; + + FG_HIT(0) <= '1'; + wait for 1 ps; + FG_HIT <= (others => '0'); + wait for 1 ps; + wait; + end process; end Behavioral; |