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| -rw-r--r-- | docs/architecture.md | 38 |
1 files changed, 32 insertions, 6 deletions
diff --git a/docs/architecture.md b/docs/architecture.md index d4632b5..cf4440f 100644 --- a/docs/architecture.md +++ b/docs/architecture.md @@ -26,14 +26,40 @@ For example, if the PPU is unable to keep up with the processing speed of the ST To ensure a smooth and enjoyable gaming experience, it is essential to address any potential issues with the PPU and communication between the STM32 and PPU during the development process. This may involve optimizing the code for both components, adjusting the communication protocol, or adding buffer systems to prevent lag or synchronization issues. -### architecture ( top level) +# architecture ( top level) ; - - - -### design document (mid-low level) - +## STM32 +### game engine +### user input +### PPU communication +### APU communication +### level editing pipeline + +## FPGA (PPU) +### PPU +### SPI +### APU + +## Screen +### VGA + + +# design document (mid-low level) +## STM32 +### game engine +### user input +### PPU communication +### APU communication +### level editing pipeline + +## FPGA (PPU) +### PPU +### SPI +### APU + +## Screen +### VGA # General system architecture  |