diff options
| -rw-r--r-- | basys3/basys3.srcs/ppu_sprite_bg.vhd | 20 | ||||
| -rw-r--r-- | basys3/basys3.srcs/ppu_sprite_bg_tb.vhd | 25 | ||||
| -rw-r--r-- | basys3/basys3.xpr | 8 |
3 files changed, 45 insertions, 8 deletions
diff --git a/basys3/basys3.srcs/ppu_sprite_bg.vhd b/basys3/basys3.srcs/ppu_sprite_bg.vhd index a92c401..391083f 100644 --- a/basys3/basys3.srcs/ppu_sprite_bg.vhd +++ b/basys3/basys3.srcs/ppu_sprite_bg.vhd @@ -67,6 +67,8 @@ architecture Behavioral of ppu_sprite_bg is signal TRANSFORM_YI, TRANSFORM_YO : std_logic_vector(PPU_SPRITE_POS_V_WIDTH-1 downto 0); signal PIXEL_BIT_OFFSET : integer := 0; begin + -- TODO: fix latches + -- CIDX tri-state driver CIDX <= O_CIDX when OE = '1' else (others => 'Z'); @@ -105,18 +107,26 @@ begin -- TMM DATA with PIXEL_BIT_OFFSET select - TMM_DATA_PAL_IDX <= TMM_DATA(2 downto 0) when 0, - TMM_DATA(5 downto 3) when 1, - TMM_DATA(8 downto 6) when 2, - TMM_DATA(11 downto 9) when 3, - TMM_DATA(14 downto 12) when 4, + TMM_DATA_PAL_IDX <= I_TMM_DATA(2 downto 0) when 0, + I_TMM_DATA(5 downto 3) when 1, + I_TMM_DATA(8 downto 6) when 2, + I_TMM_DATA(11 downto 9) when 3, + I_TMM_DATA(14 downto 12) when 4, (others => '0') when others; -- state machine (pipeline stage counter) fsm: process(CLK, RESET) begin if RESET = '1' then + -- reset state state <= PL_BAM_ADDR; + -- reset internal pipeline registers + -- O_BAM_ADDR <= (others => '0'); + -- I_BAM_DATA <= (others => '0'); + -- O_TMM_ADDR <= (others => '0'); + -- I_TMM_DATA <= (others => '0'); + -- reset working color register + -- O_CIDX <= (others => '0'); elsif rising_edge(CLK) then state <= next_state; end if; diff --git a/basys3/basys3.srcs/ppu_sprite_bg_tb.vhd b/basys3/basys3.srcs/ppu_sprite_bg_tb.vhd index 2dee2fe..65da15c 100644 --- a/basys3/basys3.srcs/ppu_sprite_bg_tb.vhd +++ b/basys3/basys3.srcs/ppu_sprite_bg_tb.vhd @@ -59,13 +59,34 @@ begin TMM_DATA => TMM_DATA, CIDX => CIDX); - BAM_DATA <= std_logic_vector(to_unsigned(16#4814#, PPU_BAM_DATA_WIDTH)); -- hex((1 << 14) | (0 << 13) | (2 << 10) | (20 << 0)) - TMM_DATA <= std_logic_vector(to_unsigned(16#ffff#, PPU_TMM_DATA_WIDTH)); + -- inputs + -- BAM_DATA -> FLIP_H + palette index 2 + tilemap index 10 + -- TMM_DATA -> all pixels color 7 + -- X -> 25 + -- Y -> 60 + -- BG_SHIFT_X -> 3 + -- BG_SHIFT_Y -> 3 + BAM_DATA <= 15x"4814"; -- hex((1 << 14) | (0 << 13) | (2 << 10) | (20 << 0)) + TMM_DATA <= 15x"7e3f"; -- hex(0x7fff & ~(0b111 << 6)) X <= std_logic_vector(to_unsigned(25, PPU_POS_H_WIDTH)); Y <= std_logic_vector(to_unsigned(60, PPU_POS_V_WIDTH)); BG_SHIFT_X <= std_logic_vector(to_unsigned(3, PPU_POS_H_WIDTH)); BG_SHIFT_Y <= std_logic_vector(to_unsigned(3, PPU_POS_V_WIDTH)); + -- expected outputs: + -- absolute pixel coordinates -> (28, 63) + -- absolute background canvas tile index coordinates -> (1, 3) + -- tile index -> 3 * 40 + 1 = 121 + -- BAM_ADDR => 121 (OK) + -- sprite local coordinates -> (12, 15) + -- transformed local coordinates -> (12, 0) (apply FLIP_H) + -- pixel index -> 0 * 16 + 12 = 12 + -- pixel word address -> 52 * 20 + 12//5 -> 1042 + -- TMM_ADDR => 1042 (OK) + -- pixel bits -> [pixel n+] = 12 % 5 = 2 -> 8 downto 6 + -- cidx should be -- (2 << 3) | (0 << 0) = 16 + -- CIDX => 16 (OK) + tb : process begin for i in 0 to 32 loop diff --git a/basys3/basys3.xpr b/basys3/basys3.xpr index 556c73e..c79fd58 100644 --- a/basys3/basys3.xpr +++ b/basys3/basys3.xpr @@ -61,7 +61,7 @@ <Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/> <Option Name="EnableBDX" Val="FALSE"/> <Option Name="DSABoardId" Val="basys3"/> - <Option Name="WTXSimLaunchSim" Val="31"/> + <Option Name="WTXSimLaunchSim" Val="39"/> <Option Name="WTModelSimLaunchSim" Val="0"/> <Option Name="WTQuestaLaunchSim" Val="0"/> <Option Name="WTIesLaunchSim" Val="0"/> @@ -217,6 +217,12 @@ <Attr Name="UsedIn" Val="simulation"/> </FileInfo> </File> + <File Path="$PSRCDIR/ppu_sprite_transform_tb.vhd"> + <FileInfo> + <Attr Name="UsedIn" Val="synthesis"/> + <Attr Name="UsedIn" Val="simulation"/> + </FileInfo> + </File> <Config> <Option Name="DesignMode" Val="RTL"/> <Option Name="TopModule" Val="ppu_sprite_bg_tb"/> |