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authorNielsCoding <48092678+heavydemon21@users.noreply.github.com>2023-03-15 20:08:12 +0100
committerNielsCoding <48092678+heavydemon21@users.noreply.github.com>2023-03-15 20:08:12 +0100
commit6a70bf52bc2ed5d28b7d08854fabfaee27be3e84 (patch)
tree940d292273ed18818a4e49fa9b2393afba9436aa /docs
parent2346a009fefb6e880bd7a36bb132cad833185080 (diff)
architecture and design
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diff --git a/docs/architecture.md b/docs/architecture.md
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@@ -26,14 +26,40 @@ For example, if the PPU is unable to keep up with the processing speed of the ST
To ensure a smooth and enjoyable gaming experience, it is essential to address any potential issues with the PPU and communication between the STM32 and PPU during the development process. This may involve optimizing the code for both components, adjusting the communication protocol, or adding buffer systems to prevent lag or synchronization issues.
-### architecture ( top level)
+# architecture ( top level)
![Top level architecture](../assets/TopLevel.PNG.);
-
-
-
-### design document (mid-low level)
-
+## STM32
+### game engine
+### user input
+### PPU communication
+### APU communication
+### level editing pipeline
+
+## FPGA (PPU)
+### PPU
+### SPI
+### APU
+
+## Screen
+### VGA
+
+
+# design document (mid-low level)
+## STM32
+### game engine
+### user input
+### PPU communication
+### APU communication
+### level editing pipeline
+
+## FPGA (PPU)
+### PPU
+### SPI
+### APU
+
+## Screen
+### VGA
# General system architecture
![Top-down system architecture diagram](../assets/architecture-level-1.svg)