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authorlonkaars <loek@pipeframe.xyz>2023-04-07 19:29:17 +0200
committerlonkaars <loek@pipeframe.xyz>2023-04-07 19:29:17 +0200
commitcc5fda1626ac77a74459bcfe3c422be3c2a5267b (patch)
tree07b46ae1a507359ac241869c7c3e5887d80880d0 /basys3
parent892424ba4d0c979e4351f7a866b6fe777783e4d2 (diff)
WIP more debugging
Diffstat (limited to 'basys3')
-rw-r--r--basys3/basys3.srcs/io.xdc3
-rw-r--r--basys3/basys3.srcs/ppu.vhd5
-rw-r--r--basys3/basys3.srcs/ppu_dispctl.vhd2
-rw-r--r--basys3/basys3.srcs/ppu_pceg.vhd3
-rw-r--r--basys3/basys3.srcs/ppu_pceg_consts.vhd3
-rw-r--r--basys3/basys3.srcs/ppu_sprite_bg.vhd1
-rw-r--r--basys3/basys3.srcs/ppu_sprite_fg.vhd21
-rw-r--r--basys3/basys3.srcs/ppu_tb.vhd.m45
-rw-r--r--basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci12
-rw-r--r--basys3/basys3.srcs/spi.vhd5
-rw-r--r--basys3/basys3.srcs/spi_tb.vhd967
-rw-r--r--basys3/basys3.srcs/spi_tb.vhd.m41
-rw-r--r--basys3/basys3.xpr26
-rw-r--r--basys3/ppu_tb_behav.wcfg375
14 files changed, 1384 insertions, 45 deletions
diff --git a/basys3/basys3.srcs/io.xdc b/basys3/basys3.srcs/io.xdc
index cda8030..2f17073 100644
--- a/basys3/basys3.srcs/io.xdc
+++ b/basys3/basys3.srcs/io.xdc
@@ -91,3 +91,6 @@ set_property PACKAGE_PIN U19 [get_ports {DBG_LEDS_OUT[2]}]
set_property PACKAGE_PIN E19 [get_ports {DBG_LEDS_OUT[1]}]
set_property PACKAGE_PIN U16 [get_ports {DBG_LEDS_OUT[0]}]
+
+set_property CONFIG_VOLTAGE 3.3 [current_design]
+set_property CFGBVS VCCO [current_design]
diff --git a/basys3/basys3.srcs/ppu.vhd b/basys3/basys3.srcs/ppu.vhd
index 445ae14..e6f959d 100644
--- a/basys3/basys3.srcs/ppu.vhd
+++ b/basys3/basys3.srcs/ppu.vhd
@@ -23,6 +23,7 @@ architecture Behavioral of ppu is
RESET : in std_logic; -- async reset
SPRITE_BG : out ppu_sprite_bg_pl_state := PL_BG_IDLE; -- sprite info fetch + sprite pixel fetch
SPRITE_FG : out ppu_sprite_fg_pl_state := PL_FG_IDLE; -- sprite pixel fetch
+ SPRITE_FG_HIT : out ppu_sprite_fg_hit_pl_state := PL_HIT_INACCURATE; -- foreground hit accuracy
DONE : out std_logic; -- last pipeline stage done
READY : out std_logic); -- rgb buffer propagation ready
end component;
@@ -109,6 +110,7 @@ architecture Behavioral of ppu is
CLK : in std_logic; -- system clock
RESET : in std_logic; -- reset internal memory and clock counters
PL_STAGE : in ppu_sprite_fg_pl_state; -- pipeline stage
+ PL_HIT : in ppu_sprite_fg_hit_pl_state;
OE : in std_logic; -- output enable (of CIDX)
X : in std_logic_vector(PPU_POS_H_WIDTH-1 downto 0); -- current screen pixel x
Y : in std_logic_vector(PPU_POS_V_WIDTH-1 downto 0); -- current screen pixel y
@@ -166,6 +168,7 @@ architecture Behavioral of ppu is
signal PL_DONE, PL_READY : std_logic; -- pipeline stages
signal PL_SPRITE_BG : ppu_sprite_bg_pl_state;
signal PL_SPRITE_FG : ppu_sprite_fg_pl_state;
+ signal PL_SPRITE_FG_HIT : ppu_sprite_fg_hit_pl_state;
signal TMM_WEN, BAM_WEN, FAM_WEN, PAL_WEN, AUX_WEN : std_logic;
signal TMM_W_ADDR, TMM_R_ADDR : std_logic_vector(PPU_TMM_ADDR_WIDTH-1 downto 0); -- read/write TMM addr (dual port)
signal BAM_W_ADDR, BAM_R_ADDR : std_logic_vector(PPU_BAM_ADDR_WIDTH-1 downto 0); -- read/write BAM addr (dual port)
@@ -202,6 +205,7 @@ begin
RESET => PCEG_RESET,
SPRITE_FG => PL_SPRITE_FG,
SPRITE_BG => PL_SPRITE_BG,
+ SPRITE_FG_HIT => PL_SPRITE_FG_HIT,
DONE => PL_DONE,
READY => PL_READY);
@@ -289,6 +293,7 @@ begin
CLK => SYSCLK,
RESET => SYSRST,
PL_STAGE => PL_SPRITE_FG,
+ PL_HIT => PL_SPRITE_FG_HIT,
OE => FG_EN(FG_IDX),
X => X,
Y => Y,
diff --git a/basys3/basys3.srcs/ppu_dispctl.vhd b/basys3/basys3.srcs/ppu_dispctl.vhd
index ce53557..ac8fbcf 100644
--- a/basys3/basys3.srcs/ppu_dispctl.vhd
+++ b/basys3/basys3.srcs/ppu_dispctl.vhd
@@ -129,7 +129,7 @@ begin
if TMP_NHCOUNT = PPU_VGA_H_PORCH_BACK + PPU_VGA_H_ACTIVE + PPU_VGA_H_SYNC then TMP_NHSYNC := '0'; end if;
end if;
- if falling_edge(TPIXCLK) then -- NOTE: falling edge used because of clock offset of 90 (should be 270)
+ if rising_edge(TPIXCLK) then
T_POS_X <= TMP_T_POS_X;
if TMP_NACTIVE = '1' then
diff --git a/basys3/basys3.srcs/ppu_pceg.vhd b/basys3/basys3.srcs/ppu_pceg.vhd
index 67b7e1c..e3c16e8 100644
--- a/basys3/basys3.srcs/ppu_pceg.vhd
+++ b/basys3/basys3.srcs/ppu_pceg.vhd
@@ -8,6 +8,7 @@ entity ppu_pceg is port(
RESET : in std_logic; -- async reset
SPRITE_BG : out ppu_sprite_bg_pl_state := PL_BG_IDLE; -- sprite info fetch + sprite pixel fetch
SPRITE_FG : out ppu_sprite_fg_pl_state := PL_FG_IDLE; -- sprite pixel fetch
+ SPRITE_FG_HIT : out ppu_sprite_fg_hit_pl_state := PL_HIT_INACCURATE; -- foreground hit accuracy
DONE : out std_logic; -- last pipeline stage done
READY : out std_logic); -- rgb buffer propagation ready
end ppu_pceg;
@@ -32,6 +33,7 @@ begin
READY <= '0';
SPRITE_BG <= PL_BG_IDLE;
SPRITE_FG <= PL_FG_IDLE;
+ SPRITE_FG_HIT <= PL_HIT_INACCURATE;
when 1 =>
SPRITE_BG <= PL_BG_BAM_ADDR;
SPRITE_FG <= PL_FG_TMM_ADDR;
@@ -44,6 +46,7 @@ begin
when 5 =>
SPRITE_BG <= PL_BG_TMM_ADDR;
SPRITE_FG <= PL_FG_IDLE;
+ SPRITE_FG_HIT <= PL_HIT_ACCURATE;
when 6 => null;
when 7 =>
SPRITE_BG <= PL_BG_IDLE;
diff --git a/basys3/basys3.srcs/ppu_pceg_consts.vhd b/basys3/basys3.srcs/ppu_pceg_consts.vhd
index eac4d23..3a9775a 100644
--- a/basys3/basys3.srcs/ppu_pceg_consts.vhd
+++ b/basys3/basys3.srcs/ppu_pceg_consts.vhd
@@ -14,5 +14,8 @@ package ppu_pceg_consts is
PL_FG_IDLE,
PL_FG_TMM_ADDR,
PL_FG_TMM_DATA);
+ type ppu_sprite_fg_hit_pl_state is (
+ PL_HIT_INACCURATE,
+ PL_HIT_ACCURATE);
end package ppu_pceg_consts;
diff --git a/basys3/basys3.srcs/ppu_sprite_bg.vhd b/basys3/basys3.srcs/ppu_sprite_bg.vhd
index cc9c24b..ef8ffc8 100644
--- a/basys3/basys3.srcs/ppu_sprite_bg.vhd
+++ b/basys3/basys3.srcs/ppu_sprite_bg.vhd
@@ -7,7 +7,6 @@ use ieee.numeric_std.all;
use work.ppu_consts.all;
use work.ppu_pceg_consts.all;
--- TODO: add input stable / output stable pipeline stages if this doesn't work with propagation delays
entity ppu_sprite_bg is port(
-- inputs
CLK : in std_logic; -- system clock
diff --git a/basys3/basys3.srcs/ppu_sprite_fg.vhd b/basys3/basys3.srcs/ppu_sprite_fg.vhd
index 89e6e66..d6ffe16 100644
--- a/basys3/basys3.srcs/ppu_sprite_fg.vhd
+++ b/basys3/basys3.srcs/ppu_sprite_fg.vhd
@@ -1,13 +1,10 @@
library ieee;
-library work;
-
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
use work.ppu_consts.all;
use work.ppu_pceg_consts.all;
--- TODO: add input stable / output stable pipeline stages if this doesn't work with propagation delays
entity ppu_sprite_fg is -- foreground sprite
generic (
IDX : natural := 0); -- sprite index number
@@ -16,6 +13,7 @@ entity ppu_sprite_fg is -- foreground sprite
CLK : in std_logic; -- system clock
RESET : in std_logic; -- reset internal memory and clock counters
PL_STAGE : in ppu_sprite_fg_pl_state; -- pipeline stage
+ PL_HIT : in ppu_sprite_fg_hit_pl_state;
OE : in std_logic; -- output enable (of CIDX)
X : in std_logic_vector(PPU_POS_H_WIDTH-1 downto 0); -- current screen pixel x
Y : in std_logic_vector(PPU_POS_V_WIDTH-1 downto 0); -- current screen pixel y
@@ -72,7 +70,7 @@ architecture Behavioral of ppu_sprite_fg is
alias FAM_REG_FLIP_V is INT_FAM(30); -- Flip vertically
alias FAM_REG_POS_H is INT_FAM(29 downto 21); -- horizontal position (offset by -16)
alias FAM_REG_POS_V is INT_FAM(20 downto 13); -- vertical position (offset by -16)
- alias FAM_REG_COL_IDX is INT_FAM(12 downto 10); -- Palette index for tile
+ alias FAM_REG_PAL_IDX is INT_FAM(12 downto 10); -- Palette index for tile
alias FAM_REG_TILE_IDX is INT_FAM(9 downto 0); -- Tilemap index
signal SPRITE_ACTIVE : std_logic := '0'; -- is pixel in bounding box of sprite
@@ -83,7 +81,7 @@ architecture Behavioral of ppu_sprite_fg is
signal TRANS_TILE_PIDX : integer := 0; -- index of pixel within tile (reading order)
signal TILEMAP_WORD : unsigned(PPU_TMM_ADDR_WIDTH-1 downto 0) := (others => '0');
signal TILEMAP_WORD_OFFSET : integer := 0; -- word offset from tile start address in TMM
- signal TMM_DATA_PAL_IDX : std_logic_vector(PPU_PALETTE_COLOR_WIDTH-1 downto 0); -- color of palette
+ signal TMM_DATA_COL_IDX : std_logic_vector(PPU_PALETTE_COLOR_WIDTH-1 downto 0); -- color of palette
begin
-- FAM memory
@@ -102,7 +100,7 @@ begin
REG => INT_FAM);
-- CIDX combination
- T_CIDX <= FAM_REG_COL_IDX & TMM_DATA_PAL_IDX;
+ T_CIDX <= FAM_REG_PAL_IDX & TMM_DATA_COL_IDX;
-- output drivers
CIDX <= T_CIDX when OE = '1' else (others => 'Z');
-- TMM memory
@@ -136,14 +134,15 @@ begin
inaccurate_occlusion_shims: if IDX >= PPU_ACCURATE_FG_SPRITE_COUNT generate
-- state machine for synchronizing pipeline stages
begin
- HIT <= SPRITE_ACTIVE;
+ HIT <= (SPRITE_ACTIVE) when PL_HIT = PL_HIT_INACCURATE else
+ (SPRITE_ACTIVE and (or TMM_DATA_COL_IDX)) when PL_HIT = PL_HIT_ACCURATE else '0';
-- only fetch if OE is high, and during the second pipeline stage
TMM_ADDR <= R_TMM_ADDR when OE = '1' and PL_STAGE = PL_FG_TMM_ADDR else (others => 'Z');
T_TMM_ADDR <= std_logic_vector(TILEMAP_WORD + to_unsigned(TILEMAP_WORD_OFFSET, PPU_TMM_ADDR_WIDTH)); -- TMM address
-- TMM DATA
with PIXEL_BIT_OFFSET select
- TMM_DATA_PAL_IDX <= R_TMM_DATA(2 downto 0) when 0,
+ TMM_DATA_COL_IDX <= R_TMM_DATA(2 downto 0) when 0,
R_TMM_DATA(5 downto 3) when 1,
R_TMM_DATA(8 downto 6) when 2,
R_TMM_DATA(11 downto 9) when 3,
@@ -156,6 +155,8 @@ begin
-- reset internal pipeline registers
R_TMM_ADDR <= (others => '0');
R_TMM_DATA <= (others => '0');
+ elsif OE = '0' then
+ null; -- don't read/write if current sprite is not the top sprite
elsif rising_edge(CLK) then
case PL_STAGE is
when PL_FG_TMM_ADDR =>
@@ -175,10 +176,10 @@ begin
signal TMM_CACHE_ADDR : std_logic_vector(PPU_TMM_ADDR_WIDTH-1 downto 0) := (others => '0');
signal TMM_CACHE : std_logic_vector((PPU_SPRITE_WORD_COUNT * PPU_TMM_DATA_WIDTH)-1 downto 0);
begin
- HIT <= SPRITE_ACTIVE and (nor TMM_DATA_PAL_IDX);
+ HIT <= SPRITE_ACTIVE and (or TMM_DATA_COL_IDX);
-- palette color at pixel
- TMM_DATA_PAL_IDX <= TMM_CACHE(TRANS_TILE_PIDX * integer(PPU_PALETTE_COLOR_WIDTH) + integer(PPU_PALETTE_COLOR_WIDTH)-1 downto TRANS_TILE_PIDX * integer(PPU_PALETTE_COLOR_WIDTH));
+ TMM_DATA_COL_IDX <= TMM_CACHE(TRANS_TILE_PIDX * integer(PPU_PALETTE_COLOR_WIDTH) + integer(PPU_PALETTE_COLOR_WIDTH)-1 downto TRANS_TILE_PIDX * integer(PPU_PALETTE_COLOR_WIDTH));
TMM_ADDR <= T_TMM_ADDR when TMM_CACHE_UPDATE_TURN else (others => 'Z');
diff --git a/basys3/basys3.srcs/ppu_tb.vhd.m4 b/basys3/basys3.srcs/ppu_tb.vhd.m4
index 97f0aef..8e405a9 100644
--- a/basys3/basys3.srcs/ppu_tb.vhd.m4
+++ b/basys3/basys3.srcs/ppu_tb.vhd.m4
@@ -49,7 +49,10 @@ begin
process
begin
- -- undivert(`test-image-ppu.tb.vhd') -- m4 macro expansion (see makefile)
+ RESET <= '1';
+ wait for 50 ns;
+ RESET <= '0';
+ -- undivert(`test-foreground-sprite-ppu.tb.vhd') -- m4 macro expansion (see makefile)
wait; -- stop after one loop (process loops in simulator)
end process;
end Behavioral;
diff --git a/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci b/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci
index 064d3ff..97aad5e 100644
--- a/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci
+++ b/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci
@@ -88,7 +88,7 @@
"CLKOUT1_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT1_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT2_REQUESTED_OUT_FREQ": [ { "value": "6.25", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
- "CLKOUT2_REQUESTED_PHASE": [ { "value": "90.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
+ "CLKOUT2_REQUESTED_PHASE": [ { "value": "0.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT2_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT3_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT3_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
@@ -173,7 +173,7 @@
"MMCM_CLKOUT0_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLKOUT1_DIVIDE": [ { "value": "128", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"MMCM_CLKOUT1_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
- "MMCM_CLKOUT1_PHASE": [ { "value": "90.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
+ "MMCM_CLKOUT1_PHASE": [ { "value": "0.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT1_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLKOUT2_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"MMCM_CLKOUT2_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
@@ -339,7 +339,7 @@
"C_OUTCLK_SUM_ROW0A": [ { "value": " Output Output Phase Duty Cycle Pk-to-Pk Phase", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW0B": [ { "value": " Clock Freq (MHz) (degrees) (%) Jitter (ps) Error (ps)", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW1": [ { "value": "__npxclk__25.00000______0.000______50.0______191.696____114.212", "resolve_type": "generated", "usage": "all" } ],
- "C_OUTCLK_SUM_ROW2": [ { "value": "__tpxclk___6.25000_____90.000______50.0______251.196____114.212", "resolve_type": "generated", "usage": "all" } ],
+ "C_OUTCLK_SUM_ROW2": [ { "value": "__tpxclk___6.25000______0.000______50.0______251.196____114.212", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW3": [ { "value": "no_CLK_OUT3_output", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW4": [ { "value": "no_CLK_OUT4_output", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW5": [ { "value": "no_CLK_OUT5_output", "resolve_type": "generated", "usage": "all" } ],
@@ -353,7 +353,7 @@
"C_CLKOUT6_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT7_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT1_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
- "C_CLKOUT2_REQUESTED_PHASE": [ { "value": "90.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
+ "C_CLKOUT2_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT3_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT4_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT5_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
@@ -374,7 +374,7 @@
"C_CLKOUT6_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT7_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
- "C_CLKOUT2_PHASE": [ { "value": "90.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
+ "C_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
@@ -424,7 +424,7 @@
"C_MMCM_CLKOUT6_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKFBOUT_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT0_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
- "C_MMCM_CLKOUT1_PHASE": [ { "value": "90.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
+ "C_MMCM_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
diff --git a/basys3/basys3.srcs/spi.vhd b/basys3/basys3.srcs/spi.vhd
index 6ca2828..ba96eee 100644
--- a/basys3/basys3.srcs/spi.vhd
+++ b/basys3/basys3.srcs/spi.vhd
@@ -22,7 +22,7 @@ architecture Behavioral of spi is
constant COUNTER_RESET_VALUE : integer := PPU_RAM_BUS_ADDR_WIDTH + PPU_RAM_BUS_DATA_WIDTH - 1;
begin
process (SYSCLK)
- variable i : integer range 0 to COUNTER_RESET_VALUE := COUNTER_RESET_VALUE; -- counter for data position
+ variable i : integer range 0 to COUNTER_RESET_VALUE := COUNTER_RESET_VALUE; -- received bits counter
variable data_r : std_logic_vector(PPU_RAM_BUS_ADDR_WIDTH+PPU_RAM_BUS_DATA_WIDTH-1 downto 0) := (others => '1'); -- data register
begin
if RESET = '1' then
@@ -53,7 +53,8 @@ begin
srFF2 <= srFF1;
if (clkFF3 = '0' and clkFF2 = '1') then
- data_r(i) := dataFF2;
+ -- data_r(i) := dataFF2;
+ data_r := data_r(data_r'high-1 downto data_r'low) & dataFF2;
if i = 0 then
i := COUNTER_RESET_VALUE;
diff --git a/basys3/basys3.srcs/spi_tb.vhd b/basys3/basys3.srcs/spi_tb.vhd
index fea96b9..c9c320e 100644
--- a/basys3/basys3.srcs/spi_tb.vhd
+++ b/basys3/basys3.srcs/spi_tb.vhd
@@ -38,7 +38,7 @@ begin
process
begin
- -- -- 0xdc00: 0f0f
+ -- -- 0xdc00: 0000
SPI_DATA <= '1';
wait for 50 ns;
SPI_CLK <= '1';
@@ -159,6 +159,247 @@ SPI_CLK <= '1';
wait for 50 ns;
SPI_CLK <= '0';
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+-- 0xffff: ffff
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+--
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
SPI_DATA <= '1';
wait for 50 ns;
SPI_CLK <= '1';
@@ -183,12 +424,43 @@ SPI_CLK <= '1';
wait for 50 ns;
SPI_CLK <= '0';
+-- 0xdc00: 0808
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
SPI_DATA <= '0';
wait for 50 ns;
SPI_CLK <= '1';
wait for 50 ns;
SPI_CLK <= '0';
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
SPI_DATA <= '0';
wait for 50 ns;
SPI_CLK <= '1';
@@ -207,6 +479,699 @@ SPI_CLK <= '1';
wait for 50 ns;
SPI_CLK <= '0';
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+--
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+-- 0xffff: ffff
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+--
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+-- 0xdc00: 0f0f
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+--
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+-- 0xffff: ffff
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+--
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
SPI_DATA <= '1';
wait for 50 ns;
SPI_CLK <= '1';
diff --git a/basys3/basys3.srcs/spi_tb.vhd.m4 b/basys3/basys3.srcs/spi_tb.vhd.m4
index cf76b2c..00bf088 100644
--- a/basys3/basys3.srcs/spi_tb.vhd.m4
+++ b/basys3/basys3.srcs/spi_tb.vhd.m4
@@ -21,6 +21,7 @@ begin
RESET => RESET,
DO => open,
DI => SPI_DATA,
+ SR => '0',
DCK => SPI_CLK,
WEN => open);
diff --git a/basys3/basys3.xpr b/basys3/basys3.xpr
index 6f6275c..c64023c 100644
--- a/basys3/basys3.xpr
+++ b/basys3/basys3.xpr
@@ -60,20 +60,20 @@
<Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
<Option Name="EnableBDX" Val="FALSE"/>
<Option Name="DSABoardId" Val="basys3"/>
- <Option Name="WTXSimLaunchSim" Val="133"/>
+ <Option Name="WTXSimLaunchSim" Val="173"/>
<Option Name="WTModelSimLaunchSim" Val="0"/>
<Option Name="WTQuestaLaunchSim" Val="0"/>
<Option Name="WTIesLaunchSim" Val="0"/>
<Option Name="WTVcsLaunchSim" Val="0"/>
<Option Name="WTRivieraLaunchSim" Val="0"/>
<Option Name="WTActivehdlLaunchSim" Val="0"/>
- <Option Name="WTXSimExportSim" Val="6"/>
- <Option Name="WTModelSimExportSim" Val="6"/>
- <Option Name="WTQuestaExportSim" Val="6"/>
+ <Option Name="WTXSimExportSim" Val="7"/>
+ <Option Name="WTModelSimExportSim" Val="7"/>
+ <Option Name="WTQuestaExportSim" Val="7"/>
<Option Name="WTIesExportSim" Val="0"/>
- <Option Name="WTVcsExportSim" Val="6"/>
- <Option Name="WTRivieraExportSim" Val="6"/>
- <Option Name="WTActivehdlExportSim" Val="6"/>
+ <Option Name="WTVcsExportSim" Val="7"/>
+ <Option Name="WTRivieraExportSim" Val="7"/>
+ <Option Name="WTActivehdlExportSim" Val="7"/>
<Option Name="GenerateIPUpgradeLog" Val="TRUE"/>
<Option Name="XSimRadix" Val="hex"/>
<Option Name="XSimTimeUnit" Val="ns"/>
@@ -255,10 +255,20 @@
<Option Name="SrcSet" Val="sources_1"/>
<Option Name="Incremental" Val="0"/>
<Option Name="xsim.simulate.runtime" Val="18 ms"/>
+ <Option Name="xsim.simulate.log_all_signals" Val="true"/>
+ <Option Name="NLNetlistMode" Val="funcsim"/>
</Config>
</FileSet>
<FileSet Name="utils_1" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
<Filter Type="Utils"/>
+ <File Path="$PSRCDIR/utils_1/imports/synth_4/top.dcp">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedInSteps" Val="synth_4"/>
+ <Attr Name="AutoDcp" Val="1"/>
+ </FileInfo>
+ </File>
<Config>
<Option Name="TopAutoSet" Val="TRUE"/>
</Config>
@@ -382,7 +392,7 @@
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
<RQSFiles/>
</Run>
- <Run Id="synth_4" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7a35tcpg236-1" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="true" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/synth_4" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_4" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_4">
+ <Run Id="synth_4" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7a35tcpg236-1" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="true" IncrementalCheckpoint="$PSRCDIR/utils_1/imports/synth_4/top.dcp" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/synth_4" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_4" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_4">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022">
<Desc>Vivado Synthesis Defaults</Desc>
diff --git a/basys3/ppu_tb_behav.wcfg b/basys3/ppu_tb_behav.wcfg
index c359e87..9acf47e 100644
--- a/basys3/ppu_tb_behav.wcfg
+++ b/basys3/ppu_tb_behav.wcfg
@@ -13,19 +13,18 @@
</db_ref>
</db_ref_list>
<zoom_setting>
- <ZoomStartTime time="136.205000 us"></ZoomStartTime>
- <ZoomEndTime time="1,382.205001 us"></ZoomEndTime>
- <Cursor1Time time="1,058.205000 us"></Cursor1Time>
+ <ZoomStartTime time="0.000000 us"></ZoomStartTime>
+ <ZoomEndTime time="2,716.000001 us"></ZoomEndTime>
+ <Cursor1Time time="450.650000 us"></Cursor1Time>
</zoom_setting>
<column_width_setting>
- <NameColumnWidth column_width="243"></NameColumnWidth>
- <ValueColumnWidth column_width="141"></ValueColumnWidth>
+ <NameColumnWidth column_width="257"></NameColumnWidth>
+ <ValueColumnWidth column_width="194"></ValueColumnWidth>
</column_width_setting>
- <WVObjectSize size="6" />
+ <WVObjectSize size="9" />
<wvobject type="group" fp_name="group136">
<obj_property name="label">clks</obj_property>
<obj_property name="DisplayName">label</obj_property>
- <obj_property name="isExpanded"></obj_property>
<wvobject type="logic" fp_name="/ppu_tb/uut/CLK100">
<obj_property name="ElementShortName">CLK100</obj_property>
<obj_property name="ObjectShortName">CLK100</obj_property>
@@ -236,7 +235,6 @@
<wvobject type="group" fp_name="group149">
<obj_property name="label">background sprite</obj_property>
<obj_property name="DisplayName">label</obj_property>
- <obj_property name="isExpanded"></obj_property>
<wvobject type="logic" fp_name="/ppu_tb/uut/background_sprite/CLK">
<obj_property name="ElementShortName">CLK</obj_property>
<obj_property name="ObjectShortName">CLK</obj_property>
@@ -249,10 +247,6 @@
<obj_property name="ElementShortName">PL_STAGE</obj_property>
<obj_property name="ObjectShortName">PL_STAGE</obj_property>
</wvobject>
- <wvobject type="logic" fp_name="/ppu_tb/uut/background_sprite/OE">
- <obj_property name="ElementShortName">OE</obj_property>
- <obj_property name="ObjectShortName">OE</obj_property>
- </wvobject>
<wvobject type="array" fp_name="/ppu_tb/uut/background_sprite/X">
<obj_property name="ElementShortName">X[8:0]</obj_property>
<obj_property name="ObjectShortName">X[8:0]</obj_property>
@@ -366,6 +360,10 @@
<obj_property name="ElementShortName">TMM_DATA_PAL_IDX[2:0]</obj_property>
<obj_property name="ObjectShortName">TMM_DATA_PAL_IDX[2:0]</obj_property>
</wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/background_sprite/OE">
+ <obj_property name="ElementShortName">OE</obj_property>
+ <obj_property name="ObjectShortName">OE</obj_property>
+ </wvobject>
<wvobject type="array" fp_name="/ppu_tb/uut/background_sprite/CIDX">
<obj_property name="ElementShortName">CIDX[5:0]</obj_property>
<obj_property name="ObjectShortName">CIDX[5:0]</obj_property>
@@ -374,12 +372,12 @@
<wvobject type="array" fp_name="/ppu_tb/uut/background_sprite/T_CIDX">
<obj_property name="ElementShortName">T_CIDX[5:0]</obj_property>
<obj_property name="ObjectShortName">T_CIDX[5:0]</obj_property>
+ <obj_property name="isExpanded"></obj_property>
</wvobject>
</wvobject>
<wvobject type="group" fp_name="group142">
<obj_property name="label">display coordinates</obj_property>
<obj_property name="DisplayName">label</obj_property>
- <obj_property name="isExpanded"></obj_property>
<wvobject type="array" fp_name="/ppu_tb/uut/display_controller/T_POS_X">
<obj_property name="ElementShortName">T_POS_X[8:0]</obj_property>
<obj_property name="ObjectShortName">T_POS_X[8:0]</obj_property>
@@ -407,7 +405,6 @@
<wvobject type="group" fp_name="group276">
<obj_property name="label">active</obj_property>
<obj_property name="DisplayName">label</obj_property>
- <obj_property name="isExpanded"></obj_property>
<wvobject type="logic" fp_name="/ppu_tb/uut/display_controller/NACTIVE">
<obj_property name="ElementShortName">NACTIVE</obj_property>
<obj_property name="ObjectShortName">NACTIVE</obj_property>
@@ -449,7 +446,6 @@
<wvobject type="group" fp_name="group115">
<obj_property name="label">pipeline stages</obj_property>
<obj_property name="DisplayName">label</obj_property>
- <obj_property name="isExpanded"></obj_property>
<wvobject type="logic" fp_name="/ppu_tb/uut/pipeline_clock_edge_generator/CLK">
<obj_property name="ElementShortName">CLK</obj_property>
<obj_property name="ObjectShortName">CLK</obj_property>
@@ -466,6 +462,10 @@
<obj_property name="ElementShortName">SPRITE_FG</obj_property>
<obj_property name="ObjectShortName">SPRITE_FG</obj_property>
</wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/pipeline_clock_edge_generator/SPRITE_FG_HIT">
+ <obj_property name="ElementShortName">SPRITE_FG_HIT</obj_property>
+ <obj_property name="ObjectShortName">SPRITE_FG_HIT</obj_property>
+ </wvobject>
<wvobject type="logic" fp_name="/ppu_tb/uut/pipeline_clock_edge_generator/DONE">
<obj_property name="ElementShortName">DONE</obj_property>
<obj_property name="ObjectShortName">DONE</obj_property>
@@ -519,4 +519,349 @@
<obj_property name="ObjectShortName">INT_REG[31:0]</obj_property>
</wvobject>
</wvobject>
+ <wvobject type="group" fp_name="group165">
+ <obj_property name="label">sprite[0]</obj_property>
+ <obj_property name="DisplayName">label</obj_property>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/CLK">
+ <obj_property name="ElementShortName">CLK</obj_property>
+ <obj_property name="ObjectShortName">CLK</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/RESET">
+ <obj_property name="ElementShortName">RESET</obj_property>
+ <obj_property name="ObjectShortName">RESET</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/PL_STAGE">
+ <obj_property name="ElementShortName">PL_STAGE</obj_property>
+ <obj_property name="ObjectShortName">PL_STAGE</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/PL_HIT">
+ <obj_property name="ElementShortName">PL_HIT</obj_property>
+ <obj_property name="ObjectShortName">PL_HIT</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/OE">
+ <obj_property name="ElementShortName">OE</obj_property>
+ <obj_property name="ObjectShortName">OE</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/X">
+ <obj_property name="ElementShortName">X[8:0]</obj_property>
+ <obj_property name="ObjectShortName">X[8:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/Y">
+ <obj_property name="ElementShortName">Y[7:0]</obj_property>
+ <obj_property name="ObjectShortName">Y[7:0]</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/FETCH">
+ <obj_property name="ElementShortName">FETCH</obj_property>
+ <obj_property name="ObjectShortName">FETCH</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/VBLANK">
+ <obj_property name="ElementShortName">VBLANK</obj_property>
+ <obj_property name="ObjectShortName">VBLANK</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/FAM_WEN">
+ <obj_property name="ElementShortName">FAM_WEN</obj_property>
+ <obj_property name="ObjectShortName">FAM_WEN</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/FAM_ADDR">
+ <obj_property name="ElementShortName">FAM_ADDR[7:0]</obj_property>
+ <obj_property name="ObjectShortName">FAM_ADDR[7:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/FAM_DATA">
+ <obj_property name="ElementShortName">FAM_DATA[15:0]</obj_property>
+ <obj_property name="ObjectShortName">FAM_DATA[15:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/TMM_ADDR">
+ <obj_property name="ElementShortName">TMM_ADDR[15:0]</obj_property>
+ <obj_property name="ObjectShortName">TMM_ADDR[15:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/TMM_DATA">
+ <obj_property name="ElementShortName">TMM_DATA[14:0]</obj_property>
+ <obj_property name="ObjectShortName">TMM_DATA[14:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/CIDX">
+ <obj_property name="ElementShortName">CIDX[5:0]</obj_property>
+ <obj_property name="ObjectShortName">CIDX[5:0]</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/HIT">
+ <obj_property name="ElementShortName">HIT</obj_property>
+ <obj_property name="ObjectShortName">HIT</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/T_TMM_ADDR">
+ <obj_property name="ElementShortName">T_TMM_ADDR[15:0]</obj_property>
+ <obj_property name="ObjectShortName">T_TMM_ADDR[15:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/R_TMM_ADDR">
+ <obj_property name="ElementShortName">R_TMM_ADDR[15:0]</obj_property>
+ <obj_property name="ObjectShortName">R_TMM_ADDR[15:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/T_TMM_DATA">
+ <obj_property name="ElementShortName">T_TMM_DATA[14:0]</obj_property>
+ <obj_property name="ObjectShortName">T_TMM_DATA[14:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/R_TMM_DATA">
+ <obj_property name="ElementShortName">R_TMM_DATA[14:0]</obj_property>
+ <obj_property name="ObjectShortName">R_TMM_DATA[14:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/T_CIDX">
+ <obj_property name="ElementShortName">T_CIDX[5:0]</obj_property>
+ <obj_property name="ObjectShortName">T_CIDX[5:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/INT_FAM">
+ <obj_property name="ElementShortName">INT_FAM[31:0]</obj_property>
+ <obj_property name="ObjectShortName">INT_FAM[31:0]</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/SPRITE_ACTIVE">
+ <obj_property name="ElementShortName">SPRITE_ACTIVE</obj_property>
+ <obj_property name="ObjectShortName">SPRITE_ACTIVE</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/PIXEL_ABS_X">
+ <obj_property name="ElementShortName">PIXEL_ABS_X</obj_property>
+ <obj_property name="ObjectShortName">PIXEL_ABS_X</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/PIXEL_ABS_Y">
+ <obj_property name="ElementShortName">PIXEL_ABS_Y</obj_property>
+ <obj_property name="ObjectShortName">PIXEL_ABS_Y</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/PIXEL_BIT_OFFSET">
+ <obj_property name="ElementShortName">PIXEL_BIT_OFFSET</obj_property>
+ <obj_property name="ObjectShortName">PIXEL_BIT_OFFSET</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/TILE_PIDX_X">
+ <obj_property name="ElementShortName">TILE_PIDX_X[3:0]</obj_property>
+ <obj_property name="ObjectShortName">TILE_PIDX_X[3:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/TRANS_TILE_PIDX_X">
+ <obj_property name="ElementShortName">TRANS_TILE_PIDX_X[3:0]</obj_property>
+ <obj_property name="ObjectShortName">TRANS_TILE_PIDX_X[3:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/TILE_PIDX_Y">
+ <obj_property name="ElementShortName">TILE_PIDX_Y[3:0]</obj_property>
+ <obj_property name="ObjectShortName">TILE_PIDX_Y[3:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/TRANS_TILE_PIDX_Y">
+ <obj_property name="ElementShortName">TRANS_TILE_PIDX_Y[3:0]</obj_property>
+ <obj_property name="ObjectShortName">TRANS_TILE_PIDX_Y[3:0]</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/TRANS_TILE_PIDX">
+ <obj_property name="ElementShortName">TRANS_TILE_PIDX</obj_property>
+ <obj_property name="ObjectShortName">TRANS_TILE_PIDX</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/TILEMAP_WORD">
+ <obj_property name="ElementShortName">TILEMAP_WORD[15:0]</obj_property>
+ <obj_property name="ObjectShortName">TILEMAP_WORD[15:0]</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/TILEMAP_WORD_OFFSET">
+ <obj_property name="ElementShortName">TILEMAP_WORD_OFFSET</obj_property>
+ <obj_property name="ObjectShortName">TILEMAP_WORD_OFFSET</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/TMM_DATA_COL_IDX">
+ <obj_property name="ElementShortName">TMM_DATA_COL_IDX[2:0]</obj_property>
+ <obj_property name="ObjectShortName">TMM_DATA_COL_IDX[2:0]</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(0)\/foreground_sprite/IDX">
+ <obj_property name="ElementShortName">IDX</obj_property>
+ <obj_property name="ObjectShortName">IDX</obj_property>
+ </wvobject>
+ </wvobject>
+ <wvobject type="group" fp_name="group166">
+ <obj_property name="label">sprite[16]</obj_property>
+ <obj_property name="DisplayName">label</obj_property>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/CLK">
+ <obj_property name="ElementShortName">CLK</obj_property>
+ <obj_property name="ObjectShortName">CLK</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/RESET">
+ <obj_property name="ElementShortName">RESET</obj_property>
+ <obj_property name="ObjectShortName">RESET</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/PL_STAGE">
+ <obj_property name="ElementShortName">PL_STAGE</obj_property>
+ <obj_property name="ObjectShortName">PL_STAGE</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/PL_HIT">
+ <obj_property name="ElementShortName">PL_HIT</obj_property>
+ <obj_property name="ObjectShortName">PL_HIT</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/OE">
+ <obj_property name="ElementShortName">OE</obj_property>
+ <obj_property name="ObjectShortName">OE</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/HIT">
+ <obj_property name="ElementShortName">HIT</obj_property>
+ <obj_property name="ObjectShortName">HIT</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/SPRITE_ACTIVE">
+ <obj_property name="ElementShortName">SPRITE_ACTIVE</obj_property>
+ <obj_property name="ObjectShortName">SPRITE_ACTIVE</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/X">
+ <obj_property name="ElementShortName">X[8:0]</obj_property>
+ <obj_property name="ObjectShortName">X[8:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/Y">
+ <obj_property name="ElementShortName">Y[7:0]</obj_property>
+ <obj_property name="ObjectShortName">Y[7:0]</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/FETCH">
+ <obj_property name="ElementShortName">FETCH</obj_property>
+ <obj_property name="ObjectShortName">FETCH</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/VBLANK">
+ <obj_property name="ElementShortName">VBLANK</obj_property>
+ <obj_property name="ObjectShortName">VBLANK</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/FAM_WEN">
+ <obj_property name="ElementShortName">FAM_WEN</obj_property>
+ <obj_property name="ObjectShortName">FAM_WEN</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/FAM_ADDR">
+ <obj_property name="ElementShortName">FAM_ADDR[7:0]</obj_property>
+ <obj_property name="ObjectShortName">FAM_ADDR[7:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/FAM_DATA">
+ <obj_property name="ElementShortName">FAM_DATA[15:0]</obj_property>
+ <obj_property name="ObjectShortName">FAM_DATA[15:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/TMM_ADDR">
+ <obj_property name="ElementShortName">TMM_ADDR[15:0]</obj_property>
+ <obj_property name="ObjectShortName">TMM_ADDR[15:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/TMM_DATA">
+ <obj_property name="ElementShortName">TMM_DATA[14:0]</obj_property>
+ <obj_property name="ObjectShortName">TMM_DATA[14:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/CIDX">
+ <obj_property name="ElementShortName">CIDX[5:0]</obj_property>
+ <obj_property name="ObjectShortName">CIDX[5:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/R_TMM_ADDR">
+ <obj_property name="ElementShortName">R_TMM_ADDR[15:0]</obj_property>
+ <obj_property name="ObjectShortName">R_TMM_ADDR[15:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/R_TMM_DATA">
+ <obj_property name="ElementShortName">R_TMM_DATA[14:0]</obj_property>
+ <obj_property name="ObjectShortName">R_TMM_DATA[14:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/T_TMM_ADDR">
+ <obj_property name="ElementShortName">T_TMM_ADDR[15:0]</obj_property>
+ <obj_property name="ObjectShortName">T_TMM_ADDR[15:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/T_TMM_DATA">
+ <obj_property name="ElementShortName">T_TMM_DATA[14:0]</obj_property>
+ <obj_property name="ObjectShortName">T_TMM_DATA[14:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/T_CIDX">
+ <obj_property name="ElementShortName">T_CIDX[5:0]</obj_property>
+ <obj_property name="ObjectShortName">T_CIDX[5:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/INT_FAM">
+ <obj_property name="ElementShortName">INT_FAM[31:0]</obj_property>
+ <obj_property name="ObjectShortName">INT_FAM[31:0]</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/PIXEL_ABS_X">
+ <obj_property name="ElementShortName">PIXEL_ABS_X</obj_property>
+ <obj_property name="ObjectShortName">PIXEL_ABS_X</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/PIXEL_ABS_Y">
+ <obj_property name="ElementShortName">PIXEL_ABS_Y</obj_property>
+ <obj_property name="ObjectShortName">PIXEL_ABS_Y</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/PIXEL_BIT_OFFSET">
+ <obj_property name="ElementShortName">PIXEL_BIT_OFFSET</obj_property>
+ <obj_property name="ObjectShortName">PIXEL_BIT_OFFSET</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/TILE_PIDX_X">
+ <obj_property name="ElementShortName">TILE_PIDX_X[3:0]</obj_property>
+ <obj_property name="ObjectShortName">TILE_PIDX_X[3:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/TRANS_TILE_PIDX_X">
+ <obj_property name="ElementShortName">TRANS_TILE_PIDX_X[3:0]</obj_property>
+ <obj_property name="ObjectShortName">TRANS_TILE_PIDX_X[3:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/TILE_PIDX_Y">
+ <obj_property name="ElementShortName">TILE_PIDX_Y[3:0]</obj_property>
+ <obj_property name="ObjectShortName">TILE_PIDX_Y[3:0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/TRANS_TILE_PIDX_Y">
+ <obj_property name="ElementShortName">TRANS_TILE_PIDX_Y[3:0]</obj_property>
+ <obj_property name="ObjectShortName">TRANS_TILE_PIDX_Y[3:0]</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/TRANS_TILE_PIDX">
+ <obj_property name="ElementShortName">TRANS_TILE_PIDX</obj_property>
+ <obj_property name="ObjectShortName">TRANS_TILE_PIDX</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/TILEMAP_WORD">
+ <obj_property name="ElementShortName">TILEMAP_WORD[15:0]</obj_property>
+ <obj_property name="ObjectShortName">TILEMAP_WORD[15:0]</obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/TILEMAP_WORD_OFFSET">
+ <obj_property name="ElementShortName">TILEMAP_WORD_OFFSET</obj_property>
+ <obj_property name="ObjectShortName">TILEMAP_WORD_OFFSET</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/TMM_DATA_COL_IDX">
+ <obj_property name="ElementShortName">TMM_DATA_COL_IDX[2:0]</obj_property>
+ <obj_property name="ObjectShortName">TMM_DATA_COL_IDX[2:0]</obj_property>
+ <obj_property name="isExpanded"></obj_property>
+ </wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/\foreground_sprites(16)\/foreground_sprite/IDX">
+ <obj_property name="ElementShortName">IDX</obj_property>
+ <obj_property name="ObjectShortName">IDX</obj_property>
+ </wvobject>
+ </wvobject>
+ <wvobject type="group" fp_name="group245">
+ <obj_property name="label">compositor</obj_property>
+ <obj_property name="DisplayName">label</obj_property>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/compositor/OE">
+ <obj_property name="ElementShortName">OE</obj_property>
+ <obj_property name="ObjectShortName">OE</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/compositor/FG_HIT[16]">
+ <obj_property name="DisplayName">label</obj_property>
+ <obj_property name="ElementShortName">[16]</obj_property>
+ <obj_property name="ObjectShortName">[16]</obj_property>
+ <obj_property name="label">FG_HIT[16]</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/compositor/FG_HIT[0]">
+ <obj_property name="DisplayName">label</obj_property>
+ <obj_property name="ElementShortName">[0]</obj_property>
+ <obj_property name="ObjectShortName">[0]</obj_property>
+ <obj_property name="label">FG_HIT[0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/compositor/FG_HIT">
+ <obj_property name="ElementShortName">FG_HIT[127:0]</obj_property>
+ <obj_property name="ObjectShortName">FG_HIT[127:0]</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/compositor/FG_EN[16]">
+ <obj_property name="DisplayName">label</obj_property>
+ <obj_property name="ElementShortName">[16]</obj_property>
+ <obj_property name="ObjectShortName">[16]</obj_property>
+ <obj_property name="label">FG_EN[16]</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/compositor/FG_EN[0]">
+ <obj_property name="DisplayName">label</obj_property>
+ <obj_property name="ElementShortName">[0]</obj_property>
+ <obj_property name="ObjectShortName">[0]</obj_property>
+ <obj_property name="label">FG_EN[0]</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/compositor/FG_EN">
+ <obj_property name="ElementShortName">FG_EN[127:0]</obj_property>
+ <obj_property name="ObjectShortName">FG_EN[127:0]</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/compositor/BG_EN">
+ <obj_property name="ElementShortName">BG_EN</obj_property>
+ <obj_property name="ObjectShortName">BG_EN</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/compositor/FG_HIT_EMPTY">
+ <obj_property name="ElementShortName">FG_HIT_EMPTY[127:0]</obj_property>
+ <obj_property name="ObjectShortName">FG_HIT_EMPTY[127:0]</obj_property>
+ </wvobject>
+ <wvobject type="logic" fp_name="/ppu_tb/uut/compositor/TMP_BG_EN">
+ <obj_property name="ElementShortName">TMP_BG_EN</obj_property>
+ <obj_property name="ObjectShortName">TMP_BG_EN</obj_property>
+ </wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/compositor/TMP_FG_EN">
+ <obj_property name="ElementShortName">TMP_FG_EN[127:0]</obj_property>
+ <obj_property name="ObjectShortName">TMP_FG_EN[127:0]</obj_property>
+ </wvobject>
+ </wvobject>
</wave_config>