diff options
author | lonkaars <loek@pipeframe.xyz> | 2023-04-07 19:29:17 +0200 |
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committer | lonkaars <loek@pipeframe.xyz> | 2023-04-07 19:29:17 +0200 |
commit | cc5fda1626ac77a74459bcfe3c422be3c2a5267b (patch) | |
tree | 07b46ae1a507359ac241869c7c3e5887d80880d0 /basys3/basys3.srcs/ppu_pceg.vhd | |
parent | 892424ba4d0c979e4351f7a866b6fe777783e4d2 (diff) |
WIP more debugging
Diffstat (limited to 'basys3/basys3.srcs/ppu_pceg.vhd')
-rw-r--r-- | basys3/basys3.srcs/ppu_pceg.vhd | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/basys3/basys3.srcs/ppu_pceg.vhd b/basys3/basys3.srcs/ppu_pceg.vhd index 67b7e1c..e3c16e8 100644 --- a/basys3/basys3.srcs/ppu_pceg.vhd +++ b/basys3/basys3.srcs/ppu_pceg.vhd @@ -8,6 +8,7 @@ entity ppu_pceg is port( RESET : in std_logic; -- async reset SPRITE_BG : out ppu_sprite_bg_pl_state := PL_BG_IDLE; -- sprite info fetch + sprite pixel fetch SPRITE_FG : out ppu_sprite_fg_pl_state := PL_FG_IDLE; -- sprite pixel fetch + SPRITE_FG_HIT : out ppu_sprite_fg_hit_pl_state := PL_HIT_INACCURATE; -- foreground hit accuracy DONE : out std_logic; -- last pipeline stage done READY : out std_logic); -- rgb buffer propagation ready end ppu_pceg; @@ -32,6 +33,7 @@ begin READY <= '0'; SPRITE_BG <= PL_BG_IDLE; SPRITE_FG <= PL_FG_IDLE; + SPRITE_FG_HIT <= PL_HIT_INACCURATE; when 1 => SPRITE_BG <= PL_BG_BAM_ADDR; SPRITE_FG <= PL_FG_TMM_ADDR; @@ -44,6 +46,7 @@ begin when 5 => SPRITE_BG <= PL_BG_TMM_ADDR; SPRITE_FG <= PL_FG_IDLE; + SPRITE_FG_HIT <= PL_HIT_ACCURATE; when 6 => null; when 7 => SPRITE_BG <= PL_BG_IDLE; |