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| author | lonkaars <loek@pipeframe.xyz> | 2023-03-12 16:59:46 +0100 |
|---|---|---|
| committer | lonkaars <loek@pipeframe.xyz> | 2023-03-12 16:59:46 +0100 |
| commit | 57da22cb15825b975d9fac499138413550903b25 (patch) | |
| tree | c27432afc91b07bb22f0508c48f825742e0d2eb1 /basys3/basys3.srcs/ppu_dispctl_demo.xdc | |
| parent | 226410265c1087f4bdbdd353d1d2d80084bead74 (diff) | |
WIP dispctl (valid VGA signal)
Diffstat (limited to 'basys3/basys3.srcs/ppu_dispctl_demo.xdc')
| -rw-r--r-- | basys3/basys3.srcs/ppu_dispctl_demo.xdc | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/basys3/basys3.srcs/ppu_dispctl_demo.xdc b/basys3/basys3.srcs/ppu_dispctl_demo.xdc index 44f2300..695de8c 100644 --- a/basys3/basys3.srcs/ppu_dispctl_demo.xdc +++ b/basys3/basys3.srcs/ppu_dispctl_demo.xdc @@ -1,3 +1,6 @@ +create_clock -period 10.000 -name CLK100 -waveform {0.000 5.000} [get_ports CLK100] +set_input_delay -clock [get_clocks CLK100] -min -add_delay 2.000 [get_ports RESET] +set_input_delay -clock [get_clocks CLK100] -max -add_delay 3.000 [get_ports RESET] set_property IOSTANDARD LVCMOS33 [get_ports {B[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {B[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {B[1]}] @@ -33,3 +36,5 @@ set_property PACKAGE_PIN G19 [get_ports {R[0]}] set_property PACKAGE_PIN T18 [get_ports RESET] set_property IOSTANDARD LVCMOS33 [get_ports RESET] + + |