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| author | lonkaars <loek@pipeframe.xyz> | 2023-04-07 19:29:17 +0200 |
|---|---|---|
| committer | lonkaars <loek@pipeframe.xyz> | 2023-04-07 19:29:17 +0200 |
| commit | cc5fda1626ac77a74459bcfe3c422be3c2a5267b (patch) | |
| tree | 07b46ae1a507359ac241869c7c3e5887d80880d0 /basys3/basys3.srcs/ppu_dispctl.vhd | |
| parent | 892424ba4d0c979e4351f7a866b6fe777783e4d2 (diff) | |
WIP more debugging
Diffstat (limited to 'basys3/basys3.srcs/ppu_dispctl.vhd')
| -rw-r--r-- | basys3/basys3.srcs/ppu_dispctl.vhd | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/basys3/basys3.srcs/ppu_dispctl.vhd b/basys3/basys3.srcs/ppu_dispctl.vhd index ce53557..ac8fbcf 100644 --- a/basys3/basys3.srcs/ppu_dispctl.vhd +++ b/basys3/basys3.srcs/ppu_dispctl.vhd @@ -129,7 +129,7 @@ begin if TMP_NHCOUNT = PPU_VGA_H_PORCH_BACK + PPU_VGA_H_ACTIVE + PPU_VGA_H_SYNC then TMP_NHSYNC := '0'; end if; end if; - if falling_edge(TPIXCLK) then -- NOTE: falling edge used because of clock offset of 90 (should be 270) + if rising_edge(TPIXCLK) then T_POS_X <= TMP_T_POS_X; if TMP_NACTIVE = '1' then |