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authorlonkaars <loek@pipeframe.xyz>2023-02-24 12:49:20 +0100
committerlonkaars <loek@pipeframe.xyz>2023-02-24 12:49:20 +0100
commit14a1c464c27206bff847fd46d3d5594b30f53af9 (patch)
tree213791289bf22a73eae33c367ccf14636f9822d0 /basys3/basys3.srcs/ppu_comp.vhd
parentfd4732181317907d51be645f75d138c2176a8e3b (diff)
update style guide and format code
Diffstat (limited to 'basys3/basys3.srcs/ppu_comp.vhd')
-rw-r--r--basys3/basys3.srcs/ppu_comp.vhd89
1 files changed, 29 insertions, 60 deletions
diff --git a/basys3/basys3.srcs/ppu_comp.vhd b/basys3/basys3.srcs/ppu_comp.vhd
index 1ea315e..e79738f 100644
--- a/basys3/basys3.srcs/ppu_comp.vhd
+++ b/basys3/basys3.srcs/ppu_comp.vhd
@@ -1,67 +1,36 @@
-----------------------------------------------------------------------------------
--- Company:
--- Engineer:
---
--- Create Date: 23.02.2023 10:31:25
--- Design Name:
--- Module Name: ppu_comp - Behavioral
--- Project Name:
--- Target Devices:
--- Tool Versions:
--- Description:
---
--- Dependencies:
---
--- Revision:
--- Revision 0.01 - File Created
--- Additional Comments:
---
-----------------------------------------------------------------------------------
-
-
-library IEEE;
-use IEEE.STD_LOGIC_1164.ALL;
+library ieee;
+use ieee.std_logic_1164.all;
use work.ppu_consts.all;
--- Uncomment the following library declaration if using
--- arithmetic functions with Signed or Unsigned values
---use IEEE.NUMERIC_STD.ALL;
-
--- Uncomment the following library declaration if instantiating
--- any Xilinx leaf cells in this code.
---library UNISIM;
---use UNISIM.VComponents.all;
-entity ppu_comp is
- Port (
- FG_HIT: in std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0);
- BG_EN: out std_logic;
- FG_EN: out std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0));
-
+entity ppu_comp is port (
+ FG_HIT : in std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0);
+ BG_EN : out std_logic;
+ FG_EN : out std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0));
end ppu_comp;
architecture Behavioral of ppu_comp is
-signal FG_HIT_Empty : std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0) := (others => '0');
+ signal FG_HIT_EMPTY : std_logic_vector(PPU_FG_SPRITE_COUNT-1 downto 0) := (others => '0');
begin
- process (FG_HIT)
- variable HIT : BOOLEAN := FALSE;
- begin
- -- check if fg_hit is not empty
- if FG_HIT /= FG_HIT_Empty then
- BG_EN <= '0';
- FOR I IN 0 TO PPU_FG_SPRITE_COUNT-1 LOOP
- -- if fg_hit is the first one then enable it
- IF(FG_HIT(I) = '1' AND HIT = FALSE) THEN
- FG_EN(I) <= '1';
- HIT := TRUE;
- ELSE
- -- make rest low
- FG_EN(I) <= '0';
- END IF;
- END LOOP;
- HIT := FALSE;
- else
- BG_EN <= '1';
- FG_EN <= (others => '0');
- end if;
- end process;
+ process (FG_HIT)
+ variable HIT : boolean := false;
+ begin
+ -- check if FG_HIT is not empty
+ if FG_HIT /= FG_HIT_EMPTY then
+ BG_EN <= '0';
+ for i in 0 to PPU_FG_SPRITE_COUNT-1 loop
+ -- if FG_HIT is the first one then enable it
+ if(FG_HIT(i) = '1' and HIT = false) then
+ FG_EN(i) <= '1';
+ HIT := true;
+ else
+ -- make rest low
+ FG_EN(i) <= '0';
+ end if;
+ end loop;
+ HIT := false;
+ else
+ BG_EN <= '1';
+ FG_EN <= (others => '0');
+ end if;
+ end process;
end Behavioral;