diff options
author | UnavailableDev <ggwildplay@gmail.com> | 2023-02-19 16:30:24 +0100 |
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committer | UnavailableDev <ggwildplay@gmail.com> | 2023-02-19 16:30:24 +0100 |
commit | c3b877f0503ce995bd79ed3f4eb74d7370839582 (patch) | |
tree | 2304f0bf3dd73f88e3985a80f348d55c55b52893 /basys3/basys3.srcs/apu_LUT_reader.vhd | |
parent | f28e1ceec5b9a6ee3f156c3f032eb7a78a08f401 (diff) |
small formatting fix
Diffstat (limited to 'basys3/basys3.srcs/apu_LUT_reader.vhd')
-rw-r--r-- | basys3/basys3.srcs/apu_LUT_reader.vhd | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/basys3/basys3.srcs/apu_LUT_reader.vhd b/basys3/basys3.srcs/apu_LUT_reader.vhd index e56f855..6039798 100644 --- a/basys3/basys3.srcs/apu_LUT_reader.vhd +++ b/basys3/basys3.srcs/apu_LUT_reader.vhd @@ -4,7 +4,7 @@ use ieee.numeric_std.all; entity apu_LUT_reader is port ( - clk : in std_logic; + clk : in std_logic; rst : in std_logic; freq : in std_logic_vector(11 downto 0); wave : in std_logic_vector(1 downto 0); @@ -27,6 +27,7 @@ begin if rst = '1' then idx <= x"00"; buf <= x"00"; + value <= x"00"; elsif rising_edge(clk) then -- main code here @@ -34,7 +35,7 @@ begin value <= std_logic_vector( idx ); elsif wave = "01" then -- Square if idx < (SAMPLE_SIZE/2) then - value <= x"00"; + value <= x"00"; --std_logic_vector( SAMPLE_SIZE-AMPLITUDE ); -- TODO: make so that this work with a changable amplitude (for square wave) else value <= x"FF"; end if; |