diff options
author | UnavailableDev <ggwildplay@gmail.com> | 2023-02-19 12:31:16 +0100 |
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committer | UnavailableDev <ggwildplay@gmail.com> | 2023-02-19 12:31:16 +0100 |
commit | f866622276090889e16e117add53384a98c4a9a7 (patch) | |
tree | 4c465a32c61b34c146d78df229fd4d1b30fc2072 /basys3/basys3.srcs/apu.vhd | |
parent | 08efcdf63f78bbf78587b4d6e93d492abd4988f4 (diff) |
apu note 2 freq
Diffstat (limited to 'basys3/basys3.srcs/apu.vhd')
-rw-r--r-- | basys3/basys3.srcs/apu.vhd | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/basys3/basys3.srcs/apu.vhd b/basys3/basys3.srcs/apu.vhd new file mode 100644 index 0000000..ea2a342 --- /dev/null +++ b/basys3/basys3.srcs/apu.vhd @@ -0,0 +1,36 @@ +library ieee; +use ieee.std_logic_1164.all; +--use ieee.numeric_std.all; + +entity apu is + port( + CLK100: in std_logic; -- system clock + RESET: in std_logic; -- global (async) system reset + DATA: in std_logic_vector(15 downto 0); + SOUND: out std_logic); + + -- EN: in std_logic; -- PPU VRAM enable (enable ADDR and DATA tri-state drivers) + -- WEN: in std_logic; -- PPU VRAM write enable + -- ADDR: in std_logic_vector(15 downto 0); -- PPU VRAM ADDR + -- R,G,B: out std_logic_vector(3 downto 0); + -- NVSYNC, NHSYNC: out std_logic; -- native VGA out + -- TVSYNC, TVBLANK, THSYNC, THBLANK: out std_logic); -- tiny VGA out +end apu; + +architecture Behavioral of apu is + + component apu_note_to_frequency port ( + data : in std_logic_vector(7 downto 0); + freq : out std_logic_vector(7 downto 0) --frequency + ); + end component; + component apu_LUT_reader port ( + clk : in std_logic; + rst : in std_logic; + wave : in std_logic_vector(1 downto 0); + level : out std_logic_vector(7 downto 0) + ); + end component; + +begin +end architecture;
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