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authorlonkaars <loek@pipeframe.xyz>2023-03-08 21:53:25 +0100
committerlonkaars <loek@pipeframe.xyz>2023-03-08 21:53:25 +0100
commit1e6f7c387dcaf0860988344d08cc4293b7132363 (patch)
tree6fa509cfaeba8a40491e34785bcb5983717de8f2
parentb239eef1a178d88c16417ef6f05642c7ce2dada4 (diff)
ppu dispctl WIP (shift XY output 2 scanlines and send THVBLANK)
-rw-r--r--basys3/basys3.srcs/ppu_consts.vhd6
-rw-r--r--basys3/basys3.srcs/ppu_dispctl.vhd23
-rw-r--r--basys3/basys3.xpr10
3 files changed, 17 insertions, 22 deletions
diff --git a/basys3/basys3.srcs/ppu_consts.vhd b/basys3/basys3.srcs/ppu_consts.vhd
index c140b98..846c7fb 100644
--- a/basys3/basys3.srcs/ppu_consts.vhd
+++ b/basys3/basys3.srcs/ppu_consts.vhd
@@ -34,7 +34,7 @@ package ppu_consts is
constant PPU_SCREEN_WIDTH : natural := 320; -- absolute screen width (tiny pixels)
constant PPU_SCREEN_HEIGHT : natural := 240; -- absolute screen height (tiny pixels)
constant PPU_NATIVE_SCREEN_WIDTH : natural := 2 * PPU_SCREEN_WIDTH; -- screen width (native pixels)
- constant PPU_NATIVE_SCREEN_HEIGHT : natural := 2 * PPU_SCREEN_WIDTH; -- screen height (native pixels)
+ constant PPU_NATIVE_SCREEN_HEIGHT : natural := 2 * PPU_SCREEN_HEIGHT; -- screen height (native pixels)
constant PPU_DISPCTL_SLBUF_ADDR_WIDTH : natural := ceil_log2(2 * PPU_SCREEN_WIDTH);
constant PPU_BG_CANVAS_TILES_H : natural := 40; -- tiles (horizontally) on background canvas
constant PPU_BG_CANVAS_TILES_V : natural := 30; -- tiles (vertically) on background canvas
@@ -58,9 +58,9 @@ package ppu_consts is
constant PPU_VGA_H_BLANK : natural := PPU_VGA_H_PORCH_FRONT + PPU_VGA_H_SYNC + PPU_VGA_H_PORCH_BACK;
constant PPU_VGA_H_TOTAL : natural := PPU_VGA_H_BLANK + PPU_VGA_H_ACTIVE;
constant PPU_VGA_V_ACTIVE : natural := PPU_NATIVE_SCREEN_HEIGHT;
- constant PPU_VGA_V_PORCH_FRONT : natural := 3;
+ constant PPU_VGA_V_PORCH_FRONT : natural := 4;
constant PPU_VGA_V_SYNC : natural := 4;
- constant PPU_VGA_V_PORCH_BACK : natural := 13;
+ constant PPU_VGA_V_PORCH_BACK : natural := 12;
constant PPU_VGA_V_BLANK : natural := PPU_VGA_V_PORCH_FRONT + PPU_VGA_V_SYNC + PPU_VGA_V_PORCH_BACK;
constant PPU_VGA_V_TOTAL : natural := PPU_VGA_V_BLANK + PPU_VGA_V_ACTIVE;
constant PPU_VGA_SIGNAL_PIXEL_IDX_MAX : natural := PPU_VGA_V_TOTAL * PPU_VGA_H_TOTAL; -- horizontal and vertical pixel clock index
diff --git a/basys3/basys3.srcs/ppu_dispctl.vhd b/basys3/basys3.srcs/ppu_dispctl.vhd
index 82d154b..725a6f2 100644
--- a/basys3/basys3.srcs/ppu_dispctl.vhd
+++ b/basys3/basys3.srcs/ppu_dispctl.vhd
@@ -45,7 +45,7 @@ architecture Behavioral of ppu_dispctl is
signal TACTIVE, THACTIVE, TVACTIVE : std_logic := '0';
begin
NHCOUNT <= PCOUNT mod PPU_VGA_H_TOTAL;
- NVCOUNT <= PCOUNT / PPU_VGA_H_TOTAL mod PPU_VGA_V_TOTAL;
+ NVCOUNT <= (PCOUNT / PPU_VGA_H_TOTAL) mod PPU_VGA_V_TOTAL;
THCOUNT <= (PCOUNT / 4) mod (PPU_VGA_H_TOTAL / 2);
TVCOUNT <= (PCOUNT / 4) / (PPU_VGA_H_TOTAL / 2) mod (PPU_VGA_V_TOTAL / 2);
@@ -68,15 +68,15 @@ begin
N_POS_X <= resize(NHCOUNT - PPU_VGA_H_PORCH_BACK, N_POS_X'length) when NHACTIVE = '1' else (others => '0');
N_POS_Y <= resize(NVCOUNT - PPU_VGA_V_PORCH_BACK, N_POS_Y'length) when NVACTIVE = '1' else (others => '0');
- T_POS_X <= resize(THCOUNT - (PPU_VGA_H_PORCH_BACK / 2), X'length); -- TODO: prevent out of range (add THACTIVE)
- T_POS_Y <= resize(TVCOUNT - (PPU_VGA_V_PORCH_BACK / 2), Y'length);
+ T_POS_X <= resize(THCOUNT - (PPU_VGA_H_PORCH_BACK / 4), T_POS_X'length) when N_POS_Y(0) = '0' else
+ resize(THCOUNT - ((PPU_VGA_H_PORCH_BACK + PPU_VGA_H_BLANK) / 4), T_POS_X'length); -- divide tiny x equally over two native scanlines
+ T_POS_Y <= resize(TVCOUNT - (PPU_VGA_V_PORCH_BACK / 2), T_POS_Y'length);
DATA_I <= RI & GI & BI;
ADDR_I <= std_logic_vector(resize(T_POS_X, ADDR_I'length)) when T_POS_Y(0) = '0' else std_logic_vector(resize(T_POS_X, ADDR_I'length) + PPU_SCREEN_WIDTH);
- -- TODO: X isn't calculated right, Y seems okay
- X <= std_logic_vector(T_POS_X);
- Y <= std_logic_vector(T_POS_Y);
+ X <= std_logic_vector(T_POS_X) when NACTIVE = '1' else (others => '0');
+ Y <= std_logic_vector(T_POS_Y) when NACTIVE = '1' else (others => '0');
U_POS_X <= resize(N_POS_X / 2, U_POS_X'length);
U_POS_Y <= resize(N_POS_Y / 2, U_POS_Y'length);
@@ -108,15 +108,14 @@ begin
end process;
process(CLK25(1), RESET)
- variable V_PCOUNT : unsigned(PPU_VGA_SIGNAL_PIXEL_WIDTH-1 downto 0) := (others => '0');
begin
- PCOUNT <= V_PCOUNT;
if RESET = '1' then
- V_PCOUNT := (others => '0');
+ PCOUNT <= (others => '0');
elsif rising_edge(CLK25(1)) then
- V_PCOUNT := V_PCOUNT + 1;
- if V_PCOUNT = PPU_VGA_SIGNAL_PIXEL_IDX_MAX then
- V_PCOUNT := (others => '0');
+ if PCOUNT + 1 >= PPU_VGA_SIGNAL_PIXEL_IDX_MAX then
+ PCOUNT <= (others => '0');
+ else
+ PCOUNT <= PCOUNT + 1;
end if;
end if;
end process;
diff --git a/basys3/basys3.xpr b/basys3/basys3.xpr
index 57112a6..1d59401 100644
--- a/basys3/basys3.xpr
+++ b/basys3/basys3.xpr
@@ -61,7 +61,7 @@
<Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
<Option Name="EnableBDX" Val="FALSE"/>
<Option Name="DSABoardId" Val="basys3"/>
- <Option Name="WTXSimLaunchSim" Val="167"/>
+ <Option Name="WTXSimLaunchSim" Val="196"/>
<Option Name="WTModelSimLaunchSim" Val="0"/>
<Option Name="WTQuestaLaunchSim" Val="0"/>
<Option Name="WTIesLaunchSim" Val="0"/>
@@ -361,9 +361,7 @@
<Runs Version="1" Minor="19">
<Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7a35tcpg236-1" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="true" IncrementalCheckpoint="$PSRCDIR/utils_1/imports/synth_1/ppu.dcp" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_1">
<Strategy Version="1" Minor="2">
- <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022">
- <Desc>Vivado Synthesis Defaults</Desc>
- </StratHandle>
+ <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022"/>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
@@ -403,9 +401,7 @@
</Run>
<Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7a35tcpg236-1" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/impl_1" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1">
<Strategy Version="1" Minor="2">
- <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2022">
- <Desc>Default settings for Implementation.</Desc>
- </StratHandle>
+ <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2022"/>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>