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authorlonkaars <loek@pipeframe.xyz>2023-03-29 20:19:28 +0200
committerlonkaars <loek@pipeframe.xyz>2023-03-29 20:19:28 +0200
commit54b6ca70a74b3beb1331fd0b0bed28c665ed1f4d (patch)
tree0ee401a0e3dd36be7719f738df3175fb7d8fd01e
parent9f38ab7fd66698c43b78b508eebc85730ba114b8 (diff)
more debugging WIP
-rw-r--r--basys3/basys3.srcs/ppu_dispctl.vhd52
-rw-r--r--basys3/basys3.srcs/ppu_pceg.vhd5
-rw-r--r--basys3/basys3.srcs/ppu_sprite_bg.vhd11
-rw-r--r--basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci12
-rw-r--r--basys3/basys3.xpr14
-rw-r--r--basys3/ppu_tb_behav.wcfg29
-rw-r--r--src/ds.c3
-rw-r--r--src/main.c34
-rw-r--r--src/makefile4
-rw-r--r--src/ppu/stm.c19
-rw-r--r--src/ppusim/sim.c1
-rw-r--r--src/stm32/main.c5
-rw-r--r--test/ppu-stm-integration-demo/data.h3
-rw-r--r--test/ppu-stm-integration-demo/img.pngbin2438 -> 2473 bytes
-rw-r--r--test/ppu-stm-integration-demo/test-image.txt2421
15 files changed, 1320 insertions, 1293 deletions
diff --git a/basys3/basys3.srcs/ppu_dispctl.vhd b/basys3/basys3.srcs/ppu_dispctl.vhd
index 4f017f3..1465a58 100644
--- a/basys3/basys3.srcs/ppu_dispctl.vhd
+++ b/basys3/basys3.srcs/ppu_dispctl.vhd
@@ -57,28 +57,6 @@ begin
ADDR_I <= std_logic_vector(resize(T_POS_X, ADDR_I'length)) when T_POS_Y(0) = '0' else std_logic_vector(resize(T_POS_X, ADDR_I'length) + PPU_SCREEN_WIDTH);
T_POS_Y <= U_POS_Y;
- -- tiny VCOUNT and HCOUNT
- process(TPIXCLK, RESET)
- variable TMP_T_POS_X : unsigned(PPU_SCREEN_T_POS_X_WIDTH-1 downto 0) := (others => '0');
- variable TMP_THBLANK, TMP_TVBLANK : std_logic := '0';
- begin
- if RESET = '1' then
- TMP_THBLANK := '0'; -- TODO
- TMP_TVBLANK := '0'; -- TODO
- elsif rising_edge(TPIXCLK) then
- T_POS_X <= TMP_T_POS_X;
-
- THBLANK <= TMP_THBLANK;
- TVBLANK <= TMP_TVBLANK;
-
- if NACTIVE = '1' then
- TMP_T_POS_X := TMP_T_POS_X + 1;
- if TMP_T_POS_X >= PPU_SCREEN_WIDTH then
- TMP_T_POS_X := (others => '0');
- end if;
- end if;
- end if;
- end process;
X <= std_logic_vector(T_POS_X) when NACTIVE = '1' else (others => '0');
Y <= std_logic_vector(T_POS_Y) when NACTIVE = '1' else (others => '0');
@@ -92,26 +70,33 @@ begin
GO <= DATA_O(7 downto 4) when NACTIVE = '1' else (others => '0');
BO <= DATA_O(3 downto 0) when NACTIVE = '1' else (others => '0');
- -- native (+upscaled) VCOUNT and HCOUNT
- process(NPIXCLK, RESET)
+ -- tiny VCOUNT and HCOUNT
+ process(TPIXCLK, NPIXCLK, RESET)
+ variable TMP_T_POS_X : unsigned(PPU_SCREEN_T_POS_X_WIDTH-1 downto 0) := (others => '0');
+ variable TMP_THBLANK, TMP_TVBLANK : std_logic := '0';
variable TMP_NHCOUNT, TMP_NVCOUNT : unsigned(PPU_VGA_SIGNAL_PIXEL_WIDTH-1 downto 0) := (others => '0');
variable TMP_NHACTIVE, TMP_NVACTIVE : std_logic := '0';
variable TMP_NHSYNC, TMP_NVSYNC : std_logic := '0';
+ variable TMP_NACTIVE : std_logic := '0';
begin
if RESET = '1' then
TMP_NHCOUNT := (others => '0');
TMP_NVCOUNT := (others => '0');
TMP_NHACTIVE := '0';
TMP_NVACTIVE := '0';
+ TMP_THBLANK := '0'; -- TODO
+ TMP_TVBLANK := '0'; -- TODO
TMP_NVSYNC := '0';
TMP_NHSYNC := '0';
- elsif rising_edge(NPIXCLK) then
+ end if;
+ -- native (+upscaled) VCOUNT and HCOUNT
+ if rising_edge(NPIXCLK) then
-- sync write (needs to be here to happen on rising edge)
NVCOUNT <= TMP_NVCOUNT;
NHCOUNT <= TMP_NHCOUNT;
NHACTIVE <= TMP_NHACTIVE;
NVACTIVE <= TMP_NVACTIVE;
- NACTIVE <= TMP_NHACTIVE and TMP_NVACTIVE;
+ NACTIVE <= TMP_NACTIVE;
NVSYNC <= TMP_NVSYNC;
NHSYNC <= TMP_NHSYNC;
N_POS_X <= resize(TMP_NHCOUNT - PPU_VGA_H_PORCH_BACK, N_POS_X'length) when TMP_NHACTIVE = '1' else (others => '0');
@@ -140,11 +125,26 @@ begin
-- horizontal display area (active)
if TMP_NHCOUNT = PPU_VGA_H_PORCH_BACK then TMP_NHACTIVE := '1'; end if;
if TMP_NHCOUNT = PPU_VGA_H_PORCH_BACK + PPU_VGA_H_ACTIVE then TMP_NHACTIVE := '0'; end if;
+ TMP_NACTIVE := TMP_NHACTIVE and TMP_NVACTIVE;
-- horizontal sync period
if TMP_NHCOUNT = PPU_VGA_H_PORCH_BACK + PPU_VGA_H_ACTIVE then TMP_NHSYNC := '1'; end if;
if TMP_NHCOUNT = PPU_VGA_H_PORCH_BACK + PPU_VGA_H_ACTIVE + PPU_VGA_H_SYNC then TMP_NHSYNC := '0'; end if;
end if;
+
+ if falling_edge(TPIXCLK) then -- NOTE: falling edge used because of clock offset of 90 (should be 270)
+ T_POS_X <= TMP_T_POS_X;
+
+ THBLANK <= TMP_THBLANK;
+ TVBLANK <= TMP_TVBLANK;
+
+ if TMP_NACTIVE = '1' then
+ TMP_T_POS_X := TMP_T_POS_X + 1;
+ if TMP_T_POS_X >= PPU_SCREEN_WIDTH then
+ TMP_T_POS_X := (others => '0');
+ end if;
+ end if;
+ end if;
end process;
ACTIVE <= NACTIVE;
diff --git a/basys3/basys3.srcs/ppu_pceg.vhd b/basys3/basys3.srcs/ppu_pceg.vhd
index 3de3d23..67b7e1c 100644
--- a/basys3/basys3.srcs/ppu_pceg.vhd
+++ b/basys3/basys3.srcs/ppu_pceg.vhd
@@ -13,6 +13,7 @@ entity ppu_pceg is port(
end ppu_pceg;
architecture Behavioral of ppu_pceg is
+ signal CLK_IDX_T : natural range 0 to PPU_PCEG_TOTAL_STAGES+1 := 0;
begin
process(CLK, RESET)
variable CLK_IDX : natural range 0 to PPU_PCEG_TOTAL_STAGES+1 := 0;
@@ -24,7 +25,7 @@ begin
SPRITE_FG <= PL_FG_IDLE;
DONE <= '0';
READY <= '0';
- elsif rising_edge(CLK) then
+ elsif falling_edge(CLK) then
case CLK_IDX is
when 0 =>
DONE <= '0';
@@ -60,6 +61,8 @@ begin
if CLK_IDX = PPU_PCEG_TOTAL_STAGES then
CLK_IDX := 0;
end if;
+
+ CLK_IDX_T <= CLK_IDX;
end if;
end process;
end Behavioral;
diff --git a/basys3/basys3.srcs/ppu_sprite_bg.vhd b/basys3/basys3.srcs/ppu_sprite_bg.vhd
index 1a91b5e..cc9c24b 100644
--- a/basys3/basys3.srcs/ppu_sprite_bg.vhd
+++ b/basys3/basys3.srcs/ppu_sprite_bg.vhd
@@ -62,13 +62,14 @@ architecture Behavioral of ppu_sprite_bg is
signal PIXEL_BIT_OFFSET : integer := 0; -- pixel index within word of TMM
signal TMM_DATA_PAL_IDX : std_logic_vector(PPU_PALETTE_COLOR_WIDTH-1 downto 0); -- color of palette
signal T_CIDX : std_logic_vector(PPU_PALETTE_CIDX_WIDTH-1 downto 0) := (others => '0'); -- output color buffer/register
+ signal BAM_ADDR_EN, TMM_ADDR_EN : boolean := false;
begin
-- output drivers
CIDX <= T_CIDX when OE = '1' else (others => 'Z');
- BAM_ADDR <= R_BAM_ADDR when PL_STAGE = PL_BG_BAM_ADDR else (others => 'Z');
- TMM_ADDR <= R_TMM_ADDR when PL_STAGE = PL_BG_TMM_ADDR else (others => 'Z');
T_BAM_DATA <= BAM_DATA;
T_TMM_DATA <= TMM_DATA;
+ BAM_ADDR <= R_BAM_ADDR when BAM_ADDR_EN else (others => 'Z');
+ TMM_ADDR <= R_TMM_ADDR when TMM_ADDR_EN else (others => 'Z');
-- CIDX combination
T_CIDX <= BAM_DATA_COL_IDX & TMM_DATA_PAL_IDX;
@@ -115,6 +116,12 @@ begin
R_TMM_ADDR <= (others => '0');
R_TMM_DATA <= (others => '0');
elsif rising_edge(CLK) then
+ BAM_ADDR_EN <= true when PL_STAGE = PL_BG_BAM_ADDR else false;
+ TMM_ADDR_EN <= true when PL_STAGE = PL_BG_TMM_ADDR else false;
+ -- R_BAM_ADDR <= T_BAM_ADDR;
+ -- R_BAM_DATA <= T_BAM_DATA;
+ -- R_TMM_ADDR <= T_TMM_ADDR;
+ -- R_TMM_DATA <= T_TMM_DATA;
case PL_STAGE is
when PL_BG_BAM_ADDR =>
R_BAM_ADDR <= T_BAM_ADDR;
diff --git a/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci b/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci
index 2e48660..064d3ff 100644
--- a/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci
+++ b/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci
@@ -88,7 +88,7 @@
"CLKOUT1_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT1_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT2_REQUESTED_OUT_FREQ": [ { "value": "6.25", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
- "CLKOUT2_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
+ "CLKOUT2_REQUESTED_PHASE": [ { "value": "90.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT2_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT3_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT3_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
@@ -173,7 +173,7 @@
"MMCM_CLKOUT0_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLKOUT1_DIVIDE": [ { "value": "128", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"MMCM_CLKOUT1_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
- "MMCM_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
+ "MMCM_CLKOUT1_PHASE": [ { "value": "90.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT1_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLKOUT2_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"MMCM_CLKOUT2_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
@@ -339,7 +339,7 @@
"C_OUTCLK_SUM_ROW0A": [ { "value": " Output Output Phase Duty Cycle Pk-to-Pk Phase", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW0B": [ { "value": " Clock Freq (MHz) (degrees) (%) Jitter (ps) Error (ps)", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW1": [ { "value": "__npxclk__25.00000______0.000______50.0______191.696____114.212", "resolve_type": "generated", "usage": "all" } ],
- "C_OUTCLK_SUM_ROW2": [ { "value": "__tpxclk___6.25000______0.000______50.0______251.196____114.212", "resolve_type": "generated", "usage": "all" } ],
+ "C_OUTCLK_SUM_ROW2": [ { "value": "__tpxclk___6.25000_____90.000______50.0______251.196____114.212", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW3": [ { "value": "no_CLK_OUT3_output", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW4": [ { "value": "no_CLK_OUT4_output", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW5": [ { "value": "no_CLK_OUT5_output", "resolve_type": "generated", "usage": "all" } ],
@@ -353,7 +353,7 @@
"C_CLKOUT6_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT7_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT1_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
- "C_CLKOUT2_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
+ "C_CLKOUT2_REQUESTED_PHASE": [ { "value": "90.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT3_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT4_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT5_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
@@ -374,7 +374,7 @@
"C_CLKOUT6_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT7_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
- "C_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
+ "C_CLKOUT2_PHASE": [ { "value": "90.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
@@ -424,7 +424,7 @@
"C_MMCM_CLKOUT6_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKFBOUT_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT0_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
- "C_MMCM_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
+ "C_MMCM_CLKOUT1_PHASE": [ { "value": "90.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
diff --git a/basys3/basys3.xpr b/basys3/basys3.xpr
index b4e930e..8645fca 100644
--- a/basys3/basys3.xpr
+++ b/basys3/basys3.xpr
@@ -60,20 +60,20 @@
<Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
<Option Name="EnableBDX" Val="FALSE"/>
<Option Name="DSABoardId" Val="basys3"/>
- <Option Name="WTXSimLaunchSim" Val="62"/>
+ <Option Name="WTXSimLaunchSim" Val="86"/>
<Option Name="WTModelSimLaunchSim" Val="0"/>
<Option Name="WTQuestaLaunchSim" Val="0"/>
<Option Name="WTIesLaunchSim" Val="0"/>
<Option Name="WTVcsLaunchSim" Val="0"/>
<Option Name="WTRivieraLaunchSim" Val="0"/>
<Option Name="WTActivehdlLaunchSim" Val="0"/>
- <Option Name="WTXSimExportSim" Val="4"/>
- <Option Name="WTModelSimExportSim" Val="4"/>
- <Option Name="WTQuestaExportSim" Val="4"/>
+ <Option Name="WTXSimExportSim" Val="6"/>
+ <Option Name="WTModelSimExportSim" Val="6"/>
+ <Option Name="WTQuestaExportSim" Val="6"/>
<Option Name="WTIesExportSim" Val="0"/>
- <Option Name="WTVcsExportSim" Val="4"/>
- <Option Name="WTRivieraExportSim" Val="4"/>
- <Option Name="WTActivehdlExportSim" Val="4"/>
+ <Option Name="WTVcsExportSim" Val="6"/>
+ <Option Name="WTRivieraExportSim" Val="6"/>
+ <Option Name="WTActivehdlExportSim" Val="6"/>
<Option Name="GenerateIPUpgradeLog" Val="TRUE"/>
<Option Name="XSimRadix" Val="hex"/>
<Option Name="XSimTimeUnit" Val="ns"/>
diff --git a/basys3/ppu_tb_behav.wcfg b/basys3/ppu_tb_behav.wcfg
index 085f335..afd33be 100644
--- a/basys3/ppu_tb_behav.wcfg
+++ b/basys3/ppu_tb_behav.wcfg
@@ -13,18 +13,19 @@
</db_ref>
</db_ref_list>
<zoom_setting>
- <ZoomStartTime time="924.298300 us"></ZoomStartTime>
- <ZoomEndTime time="943.298301 us"></ZoomEndTime>
- <Cursor1Time time="932.318300 us"></Cursor1Time>
+ <ZoomStartTime time="925.165500 us"></ZoomStartTime>
+ <ZoomEndTime time="937.055501 us"></ZoomEndTime>
+ <Cursor1Time time="930.945500 us"></Cursor1Time>
</zoom_setting>
<column_width_setting>
- <NameColumnWidth column_width="167"></NameColumnWidth>
- <ValueColumnWidth column_width="149"></ValueColumnWidth>
+ <NameColumnWidth column_width="243"></NameColumnWidth>
+ <ValueColumnWidth column_width="145"></ValueColumnWidth>
</column_width_setting>
<WVObjectSize size="6" />
<wvobject type="group" fp_name="group136">
<obj_property name="label">clks</obj_property>
<obj_property name="DisplayName">label</obj_property>
+ <obj_property name="isExpanded"></obj_property>
<wvobject type="logic" fp_name="/ppu_tb/uut/CLK100">
<obj_property name="ElementShortName">CLK100</obj_property>
<obj_property name="ObjectShortName">CLK100</obj_property>
@@ -34,8 +35,10 @@
<obj_property name="ObjectShortName">NPIXCLK</obj_property>
</wvobject>
<wvobject type="logic" fp_name="/ppu_tb/uut/display_controller/TPIXCLK">
+ <obj_property name="DisplayName">label</obj_property>
<obj_property name="ElementShortName">TPIXCLK</obj_property>
<obj_property name="ObjectShortName">TPIXCLK</obj_property>
+ <obj_property name="label">TPIXCLK</obj_property>
</wvobject>
</wvobject>
<wvobject type="group" fp_name="group150">
@@ -281,10 +284,7 @@
<wvobject type="array" fp_name="/ppu_tb/uut/background_sprite/TMM_DATA">
<obj_property name="ElementShortName">TMM_DATA[14:0]</obj_property>
<obj_property name="ObjectShortName">TMM_DATA[14:0]</obj_property>
- </wvobject>
- <wvobject type="array" fp_name="/ppu_tb/uut/background_sprite/CIDX">
- <obj_property name="ElementShortName">CIDX[5:0]</obj_property>
- <obj_property name="ObjectShortName">CIDX[5:0]</obj_property>
+ <obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject type="array" fp_name="/ppu_tb/uut/background_sprite/T_BAM_ADDR">
<obj_property name="ElementShortName">T_BAM_ADDR[10:0]</obj_property>
@@ -366,10 +366,14 @@
<obj_property name="ElementShortName">TMM_DATA_PAL_IDX[2:0]</obj_property>
<obj_property name="ObjectShortName">TMM_DATA_PAL_IDX[2:0]</obj_property>
</wvobject>
+ <wvobject type="array" fp_name="/ppu_tb/uut/background_sprite/CIDX">
+ <obj_property name="ElementShortName">CIDX[5:0]</obj_property>
+ <obj_property name="ObjectShortName">CIDX[5:0]</obj_property>
+ <obj_property name="isExpanded"></obj_property>
+ </wvobject>
<wvobject type="array" fp_name="/ppu_tb/uut/background_sprite/T_CIDX">
<obj_property name="ElementShortName">T_CIDX[5:0]</obj_property>
<obj_property name="ObjectShortName">T_CIDX[5:0]</obj_property>
- <obj_property name="isExpanded"></obj_property>
</wvobject>
</wvobject>
<wvobject type="group" fp_name="group142">
@@ -403,6 +407,7 @@
<wvobject type="group" fp_name="group276">
<obj_property name="label">active</obj_property>
<obj_property name="DisplayName">label</obj_property>
+ <obj_property name="isExpanded"></obj_property>
<wvobject type="logic" fp_name="/ppu_tb/uut/display_controller/NACTIVE">
<obj_property name="ElementShortName">NACTIVE</obj_property>
<obj_property name="ObjectShortName">NACTIVE</obj_property>
@@ -461,6 +466,10 @@
<obj_property name="ElementShortName">READY</obj_property>
<obj_property name="ObjectShortName">READY</obj_property>
</wvobject>
+ <wvobject type="other" fp_name="/ppu_tb/uut/pipeline_clock_edge_generator/CLK_IDX_T">
+ <obj_property name="ElementShortName">CLK_IDX_T</obj_property>
+ <obj_property name="ObjectShortName">CLK_IDX_T</obj_property>
+ </wvobject>
</wvobject>
<wvobject type="group" fp_name="group126">
<obj_property name="label">aux</obj_property>
diff --git a/src/ds.c b/src/ds.c
index 24ef58f..80e947e 100644
--- a/src/ds.c
+++ b/src/ds.c
@@ -1,11 +1,8 @@
-#include "demo.h"
#include "main.h"
#include "ppu/ppu.h"
void hh_setup() {
hh_ppu_init();
-
- hh_demo_setup();
}
void hh_exit() {
diff --git a/src/main.c b/src/main.c
index 8d36bf5..bbb6001 100644
--- a/src/main.c
+++ b/src/main.c
@@ -1,36 +1,22 @@
#include <stdlib.h>
-#include <stm32f0xx_hal.h>
#include "main.h"
-#include "stm32/setup.h"
#include "../test/ppu-stm-integration-demo/data.h"
+#include "ppu/internals.h"
bool g_hh_run = true;
-int main() {
- hh_setup();
-
- while (1) {
- for (unsigned long i = 0; i < HH_PPUINTDEMO_LENGTH; i++) {
- uint16_t addr = HH_PPUINTDEMO_ADDR[i];
- uint16_t data = HH_PPUINTDEMO_DATA[i];
-
- uint8_t spi_data[4] = {
- (addr & 0xff00) >> 8,
- (addr & 0x00ff) >> 0,
- (data & 0xff00) >> 8,
- (data & 0x00ff) >> 0,
- };
-
- HAL_SPI_Transmit(&hspi1, spi_data, 4, HAL_MAX_DELAY);
- HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, true);
- // HAL_Delay(1);
- HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, false);
- // HAL_Delay(1);
- }
- HAL_Delay(1e3);
+void hh_ppu_vblank_interrupt() {
+ for (unsigned long i = 0; i < HH_PPUINTDEMO_LENGTH; i++) {
+ uint16_t addr = HH_PPUINTDEMO_ADDR[i];
+ uint16_t data = HH_PPUINTDEMO_DATA[i];
+ hh_ppu_vram_dwrite(addr, data);
}
+}
+int main() {
+ hh_setup();
+ hh_loop();
hh_exit();
return 0;
}
diff --git a/src/makefile b/src/makefile
index e2fc1d3..bbd859e 100644
--- a/src/makefile
+++ b/src/makefile
@@ -27,7 +27,9 @@ LFLAGS += -lm
CFLAGS += $(if $(STM), -DHH_TARGET_STM32, )
CFLAGS += $(if $(DESKTOP), -DHH_TARGET_DESKTOP, )
-LOCAL_SRCS += main.c
+LOCAL_SRCS += ppu/internals.c \
+ ppu/ppu.c \
+ main.c
CFLAGS += $(SHARED_FLAGS)
LFLAGS += $(SHARED_FLAGS)
diff --git a/src/ppu/stm.c b/src/ppu/stm.c
index fd4a18c..371e557 100644
--- a/src/ppu/stm.c
+++ b/src/ppu/stm.c
@@ -1,4 +1,23 @@
+#include <stm32f0xx_hal.h>
+
#include "ppu/ppu.h"
+#include "ppu/internals.h"
+#include "stm32/setup.h"
void hh_ppu_init() {}
void hh_ppu_deinit() {}
+
+void hh_ppu_vram_dwrite(hh_ppu_addr_t addr, hh_ppu_data_t data) {
+ // if (!hh_ppu_vram_valid_address(addr)) return;
+
+ uint8_t spi_data[4] = {
+ (addr & 0xff00) >> 8,
+ (addr & 0x00ff) >> 0,
+ (data & 0xff00) >> 8,
+ (data & 0x00ff) >> 0,
+ };
+
+ HAL_SPI_Transmit(&hspi1, spi_data, 4, HAL_MAX_DELAY);
+ HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, true);
+ HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, false);
+}
diff --git a/src/ppusim/sim.c b/src/ppusim/sim.c
index a5fec45..be5fbeb 100644
--- a/src/ppusim/sim.c
+++ b/src/ppusim/sim.c
@@ -25,7 +25,6 @@ void hh_ppu_init() {
g_hh_ppusim_vram = malloc(sizeof(hh_ppu_data_t) * 0xffff);
memset(g_hh_ppusim_vram, 0x0000, 0xffff);
- hh_ppu_load_tilemap();
}
void hh_ppu_load_tilemap() {
diff --git a/src/stm32/main.c b/src/stm32/main.c
index d381d35..84288c3 100644
--- a/src/stm32/main.c
+++ b/src/stm32/main.c
@@ -1,8 +1,11 @@
+#include <stm32f0xx_hal.h>
+
#include "main.h"
#include "ppu/ppu.h"
void hh_ppu_load_tilemap() {}
void hh_loop() {
- while(g_hh_run);
+ HAL_Delay(1e3);
+ hh_ppu_vblank_interrupt();
}
diff --git a/test/ppu-stm-integration-demo/data.h b/test/ppu-stm-integration-demo/data.h
index a1e3097..ac73e66 100644
--- a/test/ppu-stm-integration-demo/data.h
+++ b/test/ppu-stm-integration-demo/data.h
@@ -1,4 +1,5 @@
#pragma once
-#include "test-image.h"
+// #include "test-image.h"
+#include "test-background-color.h"
diff --git a/test/ppu-stm-integration-demo/img.png b/test/ppu-stm-integration-demo/img.png
index 449d8ec..6926a8b 100644
--- a/test/ppu-stm-integration-demo/img.png
+++ b/test/ppu-stm-integration-demo/img.png
Binary files differ
diff --git a/test/ppu-stm-integration-demo/test-image.txt b/test/ppu-stm-integration-demo/test-image.txt
index 4384a33..a781f8a 100644
--- a/test/ppu-stm-integration-demo/test-image.txt
+++ b/test/ppu-stm-integration-demo/test-image.txt
@@ -103,1219 +103,1220 @@
0066: 0200
0067: 0000
dc01: 0444
-d001: 5f5a
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