it's working

9 files changed, 84 insertions, 52 deletions

diff --git a/basys3/basys3.srcs/io.xdc b/basys3/basys3.srcs/io.xdc
index 419e4cd..218d2f1 100644
--- a/basys3/basys3.srcs/io.xdc
+++ b/basys3/basys3.srcs/io.xdc
@@ -82,3 +82,5 @@ set_property PACKAGE_PIN V19 [get_ports {DBG_LEDS_OUT[3]}]
 set_property PACKAGE_PIN U19 [get_ports {DBG_LEDS_OUT[2]}]
 set_property PACKAGE_PIN E19 [get_ports {DBG_LEDS_OUT[1]}]
 set_property PACKAGE_PIN U16 [get_ports {DBG_LEDS_OUT[0]}]
+
+set_property PULLDOWN true [get_ports SPI_RESET]
diff --git a/basys3/basys3.srcs/spi.vhd b/basys3/basys3.srcs/spi.vhd
index d0e918e..6ca2828 100644
--- a/basys3/basys3.srcs/spi.vhd
+++ b/basys3/basys3.srcs/spi.vhd
@@ -5,20 +5,21 @@ use ieee.std_logic_unsigned.all;
 use work.ppu_consts.all;
 
 entity spi is port (
-	SYSCLK : in std_logic; -- clock basys3 100MHz
+	SYSCLK : in std_logic; -- system clock (100MHz)
 	RESET : in std_logic; -- async reset
 	DCK : in std_logic; -- data clock (spi format)
 	DI : in std_logic; -- data in (spi format)
-	DO : out std_logic_vector(PPU_RAM_BUS_ADDR_WIDTH+PPU_RAM_BUS_DATA_WIDTH-1 downto 0) := (others => '1'); --	data out (parallel)
+	SR : in std_logic; -- sync reset (spi reset)
+	DO : out std_logic_vector(PPU_RAM_BUS_ADDR_WIDTH+PPU_RAM_BUS_DATA_WIDTH-1 downto 0) := (others => '1'); --data out (parallel)
 	WEN : out std_logic := '0'); -- write enable (triggers during each word to propagate previous word)
 end spi;
 
 architecture Behavioral of spi is
-	signal clkFF0,clkFF1,clkFF2,clkFF3 : std_logic := '0'; -- signal for metastability synchronizer of clk SPI
-	signal dataFF0,dataFF1,dataFF2,dataFF3 : std_logic := '0'; -- signal for metastability synchronizer of data SPI
+	signal clkFF0,clkFF1,clkFF2,clkFF3 : std_logic := '0'; -- metastability
+	signal dataFF0,dataFF1,dataFF2 : std_logic := '0'; -- metastability
+	signal srFF0,srFF1,srFF2 : std_logic := '0'; -- metastability
 
 	constant COUNTER_RESET_VALUE : integer := PPU_RAM_BUS_ADDR_WIDTH + PPU_RAM_BUS_DATA_WIDTH - 1;
-	signal DBG_I : integer range 0 to COUNTER_RESET_VALUE := COUNTER_RESET_VALUE; -- counter for data position
 begin
 	process (SYSCLK)
 		variable i : integer range 0 to COUNTER_RESET_VALUE := COUNTER_RESET_VALUE; -- counter for data position
@@ -27,36 +28,60 @@ begin
 		if RESET = '1' then
 			data_r := (others => '1');
 			i := COUNTER_RESET_VALUE;
-			DBG_I <= i;
 			DO <= (others => '1');
 			WEN <= '0';
+			clkFF0 <= '0';
+			clkFF1 <= '0';
+			clkFF2 <= '0';
+			clkFF3 <= '0';
+			dataFF0 <= '0';
+			dataFF1 <= '0';
+			dataFF2 <= '0';
+			srFF0 <= '0';
+			srFF1 <= '0';
+			srFF2 <= '0';
 		elsif rising_edge(SYSCLK) then
-			-- flip flop for clk SPI to synchronise a
 			clkFF0 <= DCK;
 			clkFF1 <= clkFF0;
 			clkFF2 <= clkFF1;
 			clkFF3 <= clkFF2;
-			-- flip flop for data SPI to synchronise
 			dataFF0 <= DI;
 			dataFF1 <= dataFF0;
 			dataFF2 <= dataFF1;
-			dataFF3 <= dataFF2;
+			srFF0 <= SR;
+			srFF1 <= srFF0;
+			srFF2 <= srFF1;
 
-			if (clkFF3 = '0' and clkFF2 = '1') then -- check for rising edge of clk SPI
-				data_r(i) := dataFF3; -- load new data into temporary register
+			if (clkFF3 = '0' and clkFF2 = '1') then
+				data_r(i) := dataFF2;
 
 				if i = 0 then
-					i := COUNTER_RESET_VALUE; -- reset bit index
-					DO <= data_r; -- flush temporary register to data outpu
+					i := COUNTER_RESET_VALUE;
+					DO <= data_r;
 				else
-					i := i - 1; -- decrement bit index
+					i := i - 1;
 				end if;
 
 				-- propagate previous command to ppu during second byte of current command
 				if i = 23 then WEN <= '1'; end if;
 				if i = 15 then WEN <= '0'; end if;
 			end if;
-		DBG_I <= i;
+			if srFF2 = '1' then
+				data_r := (others => '1');
+				i := COUNTER_RESET_VALUE;
+				DO <= (others => '1');
+				WEN <= '0';
+				clkFF0 <= '0';
+				clkFF1 <= '0';
+				clkFF2 <= '0';
+				clkFF3 <= '0';
+				dataFF0 <= '0';
+				dataFF1 <= '0';
+				dataFF2 <= '0';
+				srFF0 <= '0';
+				srFF1 <= '0';
+				srFF2 <= '0';
+			end if;
 		end if;
 	end process;
 end Behavioral;
diff --git a/basys3/basys3.srcs/top.vhd b/basys3/basys3.srcs/top.vhd
index 1c58b60..e69c622 100644
--- a/basys3/basys3.srcs/top.vhd
+++ b/basys3/basys3.srcs/top.vhd
@@ -28,25 +28,26 @@ architecture Behavioral of top is
 		VBLANK : out std_logic); -- vblank for synchronization
 	end component;
 	component spi port (
-		SYSCLK : in std_logic; -- clock basys3 100MHz
+		SYSCLK : in std_logic; -- system clock (100MHz)
 		RESET : in std_logic; -- async reset
 		DCK : in std_logic; -- data clock (spi format)
 		DI : in std_logic; -- data in (spi format)
-		DO : out std_logic_vector(PPU_RAM_BUS_ADDR_WIDTH+PPU_RAM_BUS_DATA_WIDTH-1 downto 0) := (others => '0'); --	data out (parallel)
-		WEN : out std_logic); -- write enable (triggers during each word to propagate previous word)
+		SR : in std_logic; -- sync reset (spi reset)
+		DO : out std_logic_vector(PPU_RAM_BUS_ADDR_WIDTH+PPU_RAM_BUS_DATA_WIDTH-1 downto 0) := (others => '1'); --data out (parallel)
+		WEN : out std_logic := '0'); -- write enable (triggers during each word to propagate previous word)
 	end component;
 
-	signal SPI_RST, PPU_WEN : std_logic;
+	signal PPU_WEN : std_logic;
 	signal SPI_DATA : std_logic_vector(PPU_RAM_BUS_ADDR_WIDTH+PPU_RAM_BUS_DATA_WIDTH-1 downto 0);
 	alias SPI_DATA_ADDR is SPI_DATA(31 downto 16);
 	alias SPI_DATA_DATA is SPI_DATA(15 downto 0);
 begin
-	SPI_RST <= RESET or SPI_RESET;
 	serial_peripheral_interface: component spi port map(
 		SYSCLK => SYSCLK,
-		RESET => SPI_RST,
+		RESET => RESET,
 		DCK => SPI_CLK,
 		DI => SPI_MOSI,
+		SR => SPI_RESET,
 		DO => SPI_DATA,
 		WEN => PPU_WEN);
 
diff --git a/src/main.c b/src/main.c
index d8191b6..658fc94 100644
--- a/src/main.c
+++ b/src/main.c
@@ -12,30 +12,7 @@ void hh_ppu_vblank_interrupt() {
 #ifdef HH_TARGET_DESKTOP
 	if (g_hh_test_complete) return;
 #endif
-	// // uint8_t test[4] = { 0x0f, 0x0f, 0xf0, 0xf0 };
-	// uint8_t* test = malloc(4);
-	// test[0] = 0x00;
-	// test[1] = 0x00;
-	// test[2] = 0x00;
-	// test[3] = 0x00;
-	// while (1)
-	// 	hh_ppu_vram_dwrite(test, 4);
-	// return;
-	if (1) {
-		hh_ppu_vram_dwrite((uint8_t*) HH_PPUINTDEMO_ARR, HH_PPUINTDEMO_LENGTH);
-	}
-	if (0) {
-		for (size_t i = 0; i < HH_PPUINTDEMO_LENGTH; i += 4) {
-			if (i+4 > HH_PPUINTDEMO_LENGTH) break;
-			uint8_t test[4] = {
-				HH_PPUINTDEMO_ARR[i+0],
-				HH_PPUINTDEMO_ARR[i+1],
-				HH_PPUINTDEMO_ARR[i+2],
-				HH_PPUINTDEMO_ARR[i+3],
-			};
-			hh_ppu_vram_dwrite(test, 4);
-		}
-	}
+	hh_ppu_vram_dwrite((uint8_t*) HH_PPUINTDEMO_ARR, HH_PPUINTDEMO_LENGTH);
 	g_hh_test_complete = true;
 }
 
diff --git a/src/ppu/stm.c b/src/ppu/stm.c
index 8292d3c..8334090 100644
--- a/src/ppu/stm.c
+++ b/src/ppu/stm.c
@@ -8,9 +8,16 @@ void hh_ppu_init() {}
 void hh_ppu_deinit() {}
 
 void hh_ppu_vram_dwrite(uint8_t* data, size_t size) {
-	HAL_SPI_Transmit(&hspi1, data, size, HAL_MAX_DELAY);
+	// HAL_SPI_Transmit(&hspi1, data, size, HAL_MAX_DELAY);
+	for (size_t i = 0; i < size; i += 4) {
+		if (i+4 > size) break;
+		uint8_t test[4] = { data[i+0], data[i+1], data[i+2], data[i+3], };
+		HAL_SPI_Transmit(&hspi1, test, 4, HAL_MAX_DELAY);
+		// HAL_Delay(100);
+	}
+	HAL_SPI_Transmit(&hspi1, (uint8_t[4]){ 0xff }, size, HAL_MAX_DELAY);
 	// reset SPI
-	HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, true);
-	HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, false);
+	HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_SET);
+	HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_RESET);
 }
 
diff --git a/src/stm32/setup.c b/src/stm32/setup.c
index b0abe7a..4f56535 100644
--- a/src/stm32/setup.c
+++ b/src/stm32/setup.c
@@ -137,13 +137,14 @@ void hh_io_gpio_setup() {
 		.Pin = GPIO_PIN_9,
 		.Mode = GPIO_MODE_OUTPUT_PP,
 		.Pull = GPIO_NOPULL,
-		.Speed = GPIO_SPEED_FREQ_LOW,
+		.Speed = GPIO_SPEED_FREQ_HIGH,
 	});
 	HAL_GPIO_Init(GPIOA, &(GPIO_InitTypeDef) {
 		.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_8,
 		.Mode = GPIO_MODE_INPUT,
 		.Pull = GPIO_PULLDOWN,
 	});
+	HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_RESET);
 }
 
 void HAL_MspInit() {
diff --git a/test/ppu-stm-integration-demo/data.h b/test/ppu-stm-integration-demo/data.h
index cdca4a5..d86baea 100644
--- a/test/ppu-stm-integration-demo/data.h
+++ b/test/ppu-stm-integration-demo/data.h
@@ -2,4 +2,5 @@
 
 #include "test-image.h"
 // #include "test-background-color.h"
+// #include "test-spi.h"
 
diff --git a/test/ppu-stm-integration-demo/makefile b/test/ppu-stm-integration-demo/makefile
index 853dd31..5f6d235 100644
--- a/test/ppu-stm-integration-demo/makefile
+++ b/test/ppu-stm-integration-demo/makefile
@@ -1,16 +1,19 @@
 .PHONY: all clean
 
-TARGETS := test-background-color.h test-image.h test-image-spi.tb.vhd test-image-ppu.tb.vhd test-background-color-spi.tb.vhd
+SRCS := $(wildcard *.txt)
+TARGETS += $(patsubst %.txt,%.h, $(SRCS))
+TARGETS += $(patsubst %.txt,%-ppu.tb.vhd, $(SRCS))
+TARGETS += $(patsubst %.txt,%-spi.tb.vhd, $(SRCS))
 
 all: $(TARGETS)
 
 %.h: %.txt ./data2test.awk
 	tr -d ':' < $< | ./data2test.awk > $@
 
-test-%-ppu.tb.vhd: test-%.txt ./data2pputb.awk
+%-ppu.tb.vhd: %.txt ./data2pputb.awk
 	tr -d ':' < $< | ./data2pputb.awk > $@
 
-test-%-spi.tb.vhd: test-%.txt ./data2spitb.awk
+%-spi.tb.vhd: %.txt ./data2spitb.awk
 	(tr -d ':' < $<; echo "ffff ffff") | ./data2spitb.awk > $@
 
 clean:
diff --git a/test/ppu-stm-integration-demo/test-spi.txt b/test/ppu-stm-integration-demo/test-spi.txt
new file mode 100644
index 0000000..97c385a
--- /dev/null
+++ b/test/ppu-stm-integration-demo/test-spi.txt
@@ -0,0 +1,15 @@
+0000: 0000
+0000: 0000
+0000: 0000
+0000: 0000
+0000: 0000
+0f0f: f0f0
+0f0f: f0f0
+0f0f: f0f0
+0f0f: f0f0
+0f0f: f0f0
+f0f0: 0f0f
+f0f0: 0f0f
+f0f0: 0f0f
+f0f0: 0f0f
+f0f0: 0f0f