clock

interne clcok toegevoegd aan de vga modules. niks is veranderd aan de PLUT want die werkt nog steeds op dezelfde SYSCLK.

2 files changed, 99 insertions, 77 deletions

diff --git a/basys3/basys3.srcs/ppu_vga_native.vhd b/basys3/basys3.srcs/ppu_vga_native.vhd
index b337786..f5d9809 100644
--- a/basys3/basys3.srcs/ppu_vga_native.vhd
+++ b/basys3/basys3.srcs/ppu_vga_native.vhd
@@ -50,6 +50,7 @@ architecture Behavioral of ppu_vga_native is
   signal ram_x1: line_buffer; -- buffer 1
   signal hcount: STD_LOGIC_VECTOR(9 downto 0):= (others => '0');
   signal vcount: STD_LOGIC_VECTOR(9 downto 0):= (others => '0');
+  signal clkCounter: STD_LOGIC_VECTOR(1 downto 0):= (others => '0');
   signal rgb_out :  STD_LOGIC_VECTOR(11 downto 0):= (others => '0'); -- output colors
   signal px : integer; -- conversion for hcount
   signal py :integer; -- conversion for vcount
@@ -60,63 +61,65 @@ begin
         variable v_x : integer ; -- integer to hold vector X
     begin
         if rising_edge(clk) then
-
-              v_x := TO_INTEGER(unsigned(x) - 72);
-              if(v_x >= 0 and v_x < 320 and PREADY = '1') then
-                 if(y(0) = '0') then
-                    ram_x0(v_x) <= RI & GI & BI;
-                    if v_x = 319 then
-                        bufferFilledOnbuffer0 <= TO_INTEGER(unsigned(y) - 14);
-                    end if;
-                else
-                    ram_x1(v_x) <= RI & GI & BI;
-                    if v_x = 319 then
-                        bufferFilledOnbuffer1 <= TO_INTEGER(unsigned(y) - 14);
+            clkCounter <= clkCounter + 1;
+            if(clkCounter = "11")then
+                  v_x := TO_INTEGER(unsigned(x) - 72);
+                  if(v_x >= 0 and v_x < 320 and PREADY = '1') then
+                     if(y(0) = '0') then
+                        ram_x0(v_x) <= RI & GI & BI;
+                        if v_x = 319 then
+                            bufferFilledOnbuffer0 <= TO_INTEGER(unsigned(y) - 14);
+                        end if;
+                    else
+                        ram_x1(v_x) <= RI & GI & BI;
+                        if v_x = 319 then
+                            bufferFilledOnbuffer1 <= TO_INTEGER(unsigned(y) - 14);
+                        end if;
+                    end if;          
+                 end if;     
+                -- T display(display data)     
+                if (hcount >= 144) and (hcount < 784) and (vcount >= 31) and (vcount < 511) then
+                    px <= TO_INTEGER(unsigned(hcount) - 144); 
+                    py <= TO_INTEGER(unsigned(vcount) - 31);   
+                    if(bufferFilledonBuffer0 = (py/2)) then
+                        rgb_out <= ram_x0(px/2);
+                    elsif(bufferFilledonbuffer1 = (py/2)) then
+                        rgb_out <= ram_x1(px/2); 
+                
+                    else
+                        rgb_out <= (others => '0');
+                
                     end if;
-                end if;          
-             end if;     
-            -- T display(display data)     
-            if (hcount >= 144) and (hcount < 784) and (vcount >= 31) and (vcount < 511) then
-                px <= TO_INTEGER(unsigned(hcount) - 144); 
-                py <= TO_INTEGER(unsigned(vcount) - 31);   
-                if(bufferFilledonBuffer0 = (py/2)) then
-                    rgb_out <= ram_x0(px/2);
-                elsif(bufferFilledonbuffer1 = (py/2)) then
-                    rgb_out <= ram_x1(px/2); 
-
-                else
-                    rgb_out <= (others => '0');
-
+                end if;
+                -- pulse width
+                hsync <= '1';
+                if hcount < 97 then
+                    hsync <= '0';
+                end if;
+                
+                vsync <= '1';
+                if vcount < 3 then
+                    vsync <= '0';
+                end if;
+                
+                -- sync pulse time
+                hcount <= hcount + 1;
+                
+                if hcount = 800 then
+                    vcount <= vcount + 1;
+                    hcount <= (others => '0');
+                end if;
+                
+                if vcount = 521 then
+                    vcount <= (others => '0');
                 end if;
             end if;
-            -- pulse width
-            hsync <= '1';
-            if hcount < 97 then
-                hsync <= '0';
-            end if;
-
-            vsync <= '1';
-            if vcount < 3 then
-                vsync <= '0';
-            end if;
-
-            -- sync pulse time
-            hcount <= hcount + 1;
-
-            if hcount = 800 then
-                vcount <= vcount + 1;
-                hcount <= (others => '0');
-            end if;
-
-            if vcount = 521 then
-                vcount <= (others => '0');
-            end if;
-
+            
+            -- output colors
+        RO <= rgb_out(11 downto 8);
+        GO <= rgb_out(7 downto 4);
+        BO <= rgb_out(3 downto 0);
         end if;
-        -- output colors
-    RO <= rgb_out(11 downto 8);
-    GO <= rgb_out(7 downto 4);
-    BO <= rgb_out(3 downto 0);
     end process;
 
 end Behavioral;
diff --git a/basys3/basys3.srcs/ppu_vga_tiny.vhd b/basys3/basys3.srcs/ppu_vga_tiny.vhd
index 0132d7c..7b1703e 100644
--- a/basys3/basys3.srcs/ppu_vga_tiny.vhd
+++ b/basys3/basys3.srcs/ppu_vga_tiny.vhd
@@ -46,37 +46,56 @@ end ppu_vga_tiny;
 architecture Behavioral of ppu_vga_tiny is
   signal hcount: STD_LOGIC_VECTOR(PPU_POS_H_WIDTH-1 downto 0):= (others => '0');
   signal vcount: STD_LOGIC_VECTOR(PPU_POS_V_WIDTH-1 downto 0):= (others => '0');
+  signal CLKcounter: STD_LOGIC_VECTOR(4 downto 0):= (others => '0');
   
 begin
 process (CLK) 
 begin
     if rising_edge(CLK) then
-           -- x,y data uit
+        CLKcounter <= CLKcounter + 1;
+        if(CLKcounter > 15) then
+            -- x,y data uit
             X <= hcount;
             Y <= vcount;
-         --pulse width
-          if hcount < 32 then
-            hsync <= '0';
-          else
-            hsync <= '1';
-          end if;
-    
-          if vcount < 8 then
-            vsync <= '0';
-          else
-            vsync <= '1';
-          end if;
-         -- sync pulse time
-          hcount <= hcount + 1;
-         
-          if hcount = 400 then
-            vcount <= vcount + 1;
-            hcount <= (others => '0');
-          end if;
-         
-          if vcount = 255 then	   
-            vcount <= (others => '0');
-         end if;
+             
+            --pulse width
+            if hcount < 32 or hcount >= 320-80 then
+                hsync <= '0';
+            else
+                hsync <= '1';
+            end if;
+        
+            if vcount < 8 or vcount >= 240-15 then
+                vsync <= '0';
+            else
+                vsync <= '1';
+            end if;
+             
+            -- Hblank and Vblank outputs
+            if hcount >= 320-80 then
+                hblank <= '1';
+            else
+                hblank <= '0';
+            end if;
+            
+            if vcount >= 240-15 then
+                vblank <= '1';
+            else
+                vblank <= '0';
+            end if;
+             
+            -- sync pulse time
+            hcount <= hcount + 1;
+             
+            if hcount = 400 then
+                vcount <= vcount + 1;
+                hcount <= (others => '0');
+            end if;
+             
+            if vcount = 255 then	   
+                vcount <= (others => '0');
+            end if;
+        end if;
     end if;
 end process;