diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/main-bouncing-ball.vhd | 3 | ||||
-rw-r--r-- | src/pixeldata-ball.vhd | 12 |
2 files changed, 9 insertions, 6 deletions
diff --git a/src/main-bouncing-ball.vhd b/src/main-bouncing-ball.vhd index 521a0c0..83b60f7 100644 --- a/src/main-bouncing-ball.vhd +++ b/src/main-bouncing-ball.vhd @@ -19,7 +19,7 @@ architecture Behavioral of main is hsync, vsync: out std_logic); end component; component pixeldata port ( - pixel_clk, bounce_clk, reset: in std_logic; + sys_clk, pixel_clk, bounce_clk, reset: in std_logic; x, y: in std_logic_vector(9 downto 0); rgb: out std_logic_vector(11 downto 0)); end component; @@ -40,6 +40,7 @@ begin -- get current pixel color pixel: component pixeldata port map ( + sys_clk => clk, pixel_clk => clk25(1), bounce_clk => vsync_inv, reset => reset, diff --git a/src/pixeldata-ball.vhd b/src/pixeldata-ball.vhd index 4690241..5f17f2d 100644 --- a/src/pixeldata-ball.vhd +++ b/src/pixeldata-ball.vhd @@ -5,7 +5,7 @@ use ieee.numeric_std.all; entity pixeldata is port ( - pixel_clk, bounce_clk, reset: in std_logic; + sys_clk, pixel_clk, bounce_clk, reset: in std_logic; x, y: in std_logic_vector(9 downto 0); rgb: out std_logic_vector(11 downto 0)); end pixeldata; @@ -18,8 +18,9 @@ architecture Behavioral of pixeldata is end component; component ball_rom port ( - a: in std_logic_vector(6 downto 0); - spo: out std_logic_vector(11 downto 0)); + clka: in std_logic; + addra: in std_logic_vector(6 downto 0); + douta: out std_logic_vector(11 downto 0)); end component; signal sx, sy: std_logic_vector(9 downto 0); -- square x and y signal bitmap_idx: std_logic_vector(6 downto 0); @@ -33,8 +34,9 @@ begin y => sy); bitmap_lookup: component ball_rom port map ( - a => bitmap_idx, - spo => bitmap_out); + clka => sys_clk, + addra => bitmap_idx, + douta => bitmap_out); process(pixel_clk) begin if rising_edge(pixel_clk) then |