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Diffstat (limited to 'src/add8bs.vhd')
| -rw-r--r-- | src/add8bs.vhd | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/add8bs.vhd b/src/add8bs.vhd index c5a1530..83e048f 100644 --- a/src/add8bs.vhd +++ b/src/add8bs.vhd @@ -25,6 +25,8 @@ architecture Behavioral of add8bs is X, Cout: out std_logic); end component; begin + -- add8b (signed) + -- add first eight bits normally add0: component add8b port map ( A => A, @@ -32,6 +34,7 @@ begin Cin => Cin, X => X, Cout => C); + -- extend signed (two's complement) number to 9-bits add1: component add1b port map ( A => A(7), |