aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--.gitignore2
-rw-r--r--blink/blink.srcs/sources_1/new/main.vhd3
-rw-r--r--blink/blink.xpr19
-rw-r--r--blink/readme.md4
4 files changed, 19 insertions, 9 deletions
diff --git a/.gitignore b/.gitignore
index 179bb9f..4bc026e 100644
--- a/.gitignore
+++ b/.gitignore
@@ -4,3 +4,5 @@
*/*.ip_user_files
*/*.runs
*/*.sim
+
+**/*.dcp
diff --git a/blink/blink.srcs/sources_1/new/main.vhd b/blink/blink.srcs/sources_1/new/main.vhd
index b90915b..12aff02 100644
--- a/blink/blink.srcs/sources_1/new/main.vhd
+++ b/blink/blink.srcs/sources_1/new/main.vhd
@@ -9,8 +9,7 @@ entity main is
led : out STD_LOGIC);
end main;
-architecture Behavioral of main is
- signal count: STD_LOGIC_VECTOR(24 downto 0);
+architecture Behavioral of main is signal count: STD_LOGIC_VECTOR(24 downto 0);
begin
process(clk)
begin
diff --git a/blink/blink.xpr b/blink/blink.xpr
index 8b183dd..1621ba4 100644
--- a/blink/blink.xpr
+++ b/blink/blink.xpr
@@ -118,6 +118,7 @@
</Config>
</FileSet>
<FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1" RelGenDir="$PGENDIR/sim_1">
+ <Filter Type="Srcs"/>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="main"/>
@@ -135,6 +136,14 @@
</FileSet>
<FileSet Name="utils_1" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
<Filter Type="Utils"/>
+ <File Path="$PSRCDIR/utils_1/imports/synth_1/main.dcp">
+ <FileInfo>
+ <Attr Name="UsedIn" Val="synthesis"/>
+ <Attr Name="UsedIn" Val="implementation"/>
+ <Attr Name="UsedInSteps" Val="synth_1"/>
+ <Attr Name="AutoDcp" Val="1"/>
+ </FileInfo>
+ </File>
<Config>
<Option Name="TopAutoSet" Val="TRUE"/>
</Config>
@@ -162,11 +171,9 @@
</Simulator>
</Simulators>
<Runs Version="1" Minor="19">
- <Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7a35tcpg236-1" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="true" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_1">
+ <Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7a35tcpg236-1" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="true" IncrementalCheckpoint="$PSRCDIR/utils_1/imports/synth_1/main.dcp" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_1">
<Strategy Version="1" Minor="2">
- <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022">
- <Desc>Vivado Synthesis Defaults</Desc>
- </StratHandle>
+ <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022"/>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
@@ -176,9 +183,7 @@
</Run>
<Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7a35tcpg236-1" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/impl_1" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1">
<Strategy Version="1" Minor="2">
- <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2022">
- <Desc>Default settings for Implementation.</Desc>
- </StratHandle>
+ <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2022"/>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>
diff --git a/blink/readme.md b/blink/readme.md
new file mode 100644
index 0000000..3ec146e
--- /dev/null
+++ b/blink/readme.md
@@ -0,0 +1,4 @@
+# blink
+
+dit is een test project zoals beschreven in kennisclip 0.1. dit project bevat
+een configuratie die LD0 laat knipperen m.b.v. CLK100MHz.