format/move code a little for consistency

1 files changed, 22 insertions, 0 deletions

diff --git a/blink/blink.srcs/sources_1/main.vhd b/blink/blink.srcs/sources_1/main.vhd
new file mode 100644
index 0000000..12aff02
--- /dev/null
+++ b/blink/blink.srcs/sources_1/main.vhd
@@ -0,0 +1,22 @@
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+use IEEE.STD_LOGIC_ARITH.ALL;
+use IEEE.STD_LOGIC_UNSIGNED.ALL;
+use IEEE.NUMERIC_STD.ALL;
+
+entity main is
+	Port (clk : in STD_LOGIC;
+	      led : out STD_LOGIC);
+end main;
+
+architecture Behavioral of main is signal count: STD_LOGIC_VECTOR(24 downto 0);
+begin
+	process(clk)
+	begin
+		if rising_edge(clk) then
+			count <= (count + 1);
+		end if;
+	end process;
+	led <= count(24);
+
+end Behavioral;