From 3d58a338a16bc41b9106857645fabc0221de711d Mon Sep 17 00:00:00 2001
From: RSDuck <RSDuck@users.noreply.github.com>
Date: Sun, 22 Oct 2023 15:21:03 +0200
Subject: store pc+12 when storing r15

---
 src/ARMInterpreter_LoadStore.cpp | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/ARMInterpreter_LoadStore.cpp b/src/ARMInterpreter_LoadStore.cpp
index e7b83eb..81877f0 100644
--- a/src/ARMInterpreter_LoadStore.cpp
+++ b/src/ARMInterpreter_LoadStore.cpp
@@ -62,14 +62,20 @@ namespace ARMInterpreter
 
 #define A_STR \
     offset += cpu->R[(cpu->CurInstr>>16) & 0xF]; \
-    cpu->DataWrite32(offset, cpu->R[(cpu->CurInstr>>12) & 0xF]); \
+    u32 storeval = cpu->R[(cpu->CurInstr>>12) & 0xF]; \
+    if (((cpu->CurInstr>>12) & 0xF) == 0xF) \
+        storeval += 4; \
+    cpu->DataWrite32(offset, storeval); \
     if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset; \
     cpu->AddCycles_CD();
 
 // TODO: user mode (bit21)
 #define A_STR_POST \
     u32 addr = cpu->R[(cpu->CurInstr>>16) & 0xF]; \
-    cpu->DataWrite32(addr, cpu->R[(cpu->CurInstr>>12) & 0xF]); \
+    u32 storeval = cpu->R[(cpu->CurInstr>>12) & 0xF]; \
+    if (((cpu->CurInstr>>12) & 0xF) == 0xF) \
+        storeval += 4; \
+    cpu->DataWrite32(addr, storeval); \
     cpu->R[(cpu->CurInstr>>16) & 0xF] += offset; \
     cpu->AddCycles_CD();
 
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