From 298b958e2a105ba29f07ee110cd9f856da1f66d7 Mon Sep 17 00:00:00 2001
From: webgeek1234 <webgeek1234@gmail.com>
Date: Tue, 1 Dec 2020 12:48:46 -0600
Subject: Rename jit linkage asm files (#836)

An extension of lower case s indicates to not run the
preprocessor while upper case S does. These files have defines.
---
 src/ARMJIT_A64/ARMJIT_Linkage.S | 68 +++++++++++++++++++++++++++++++
 src/ARMJIT_A64/ARMJIT_Linkage.s | 68 -------------------------------
 src/ARMJIT_x64/ARMJIT_Linkage.S | 88 +++++++++++++++++++++++++++++++++++++++++
 src/ARMJIT_x64/ARMJIT_Linkage.s | 88 -----------------------------------------
 src/CMakeLists.txt              |  6 +--
 5 files changed, 158 insertions(+), 160 deletions(-)
 create mode 100644 src/ARMJIT_A64/ARMJIT_Linkage.S
 delete mode 100644 src/ARMJIT_A64/ARMJIT_Linkage.s
 create mode 100644 src/ARMJIT_x64/ARMJIT_Linkage.S
 delete mode 100644 src/ARMJIT_x64/ARMJIT_Linkage.s

(limited to 'src')

diff --git a/src/ARMJIT_A64/ARMJIT_Linkage.S b/src/ARMJIT_A64/ARMJIT_Linkage.S
new file mode 100644
index 0000000..7886315
--- /dev/null
+++ b/src/ARMJIT_A64/ARMJIT_Linkage.S
@@ -0,0 +1,68 @@
+#include "../ARMJIT_x64/ARMJIT_Offsets.h"
+
+.text
+
+#define RCPSR w27
+#define RCycles w28
+#define RCPU x29
+
+.p2align 4,,15
+
+.global ARM_Dispatch
+ARM_Dispatch:
+    stp x19, x20, [sp, #-96]!
+    stp x21, x22, [sp, #16]
+    stp x23, x24, [sp, #32]
+    stp x25, x26, [sp, #48]
+    stp x27, x28, [sp, #64]
+    stp x29, x30, [sp, #80]
+
+    mov RCPU, x0
+    ldr RCycles, [RCPU, ARM_Cycles_offset]
+    ldr RCPSR, [RCPU, ARM_CPSR_offset]
+
+    br x1
+
+.p2align 4,,15
+
+.global ARM_Ret
+ARM_Ret:
+    str RCycles, [RCPU, ARM_Cycles_offset]
+    str RCPSR, [RCPU, ARM_CPSR_offset]
+
+    ldp x29, x30, [sp, #80]
+    ldp x27, x28, [sp, #64]
+    ldp x25, x26, [sp, #48]
+    ldp x23, x24, [sp, #32]
+    ldp x21, x22, [sp, #16]
+    ldp x19, x20, [sp], #96
+
+    ret
+
+.p2align 4,,15
+
+.global ARM_RestoreContext
+ARM_RestoreContext:
+    mov sp, x0
+
+    ldp x0, x1, [sp]
+    ldp x2, x3, [sp, #16]
+    ldp x4, x5, [sp, #32]
+    ldp x6, x7, [sp, #48]
+    ldp x8, x9, [sp, #64]
+    ldp x10, x11, [sp, #80]
+    ldp x12, x13, [sp, #96]
+    ldp x14, x15, [sp, #112]
+    ldp x16, x17, [sp, #128]
+    ldp x18, x19, [sp, #144]
+    ldp x20, x21, [sp, #160]
+    ldp x22, x23, [sp, #176]
+    ldp x24, x25, [sp, #192]
+    ldp x26, x27, [sp, #208]
+    ldp x28, x29, [sp, #224]
+    ldr x30, [sp, #240]
+
+    ldp x17, x18, [sp, #248]
+    mov sp, x17
+
+    br x18
\ No newline at end of file
diff --git a/src/ARMJIT_A64/ARMJIT_Linkage.s b/src/ARMJIT_A64/ARMJIT_Linkage.s
deleted file mode 100644
index 7886315..0000000
--- a/src/ARMJIT_A64/ARMJIT_Linkage.s
+++ /dev/null
@@ -1,68 +0,0 @@
-#include "../ARMJIT_x64/ARMJIT_Offsets.h"
-
-.text
-
-#define RCPSR w27
-#define RCycles w28
-#define RCPU x29
-
-.p2align 4,,15
-
-.global ARM_Dispatch
-ARM_Dispatch:
-    stp x19, x20, [sp, #-96]!
-    stp x21, x22, [sp, #16]
-    stp x23, x24, [sp, #32]
-    stp x25, x26, [sp, #48]
-    stp x27, x28, [sp, #64]
-    stp x29, x30, [sp, #80]
-
-    mov RCPU, x0
-    ldr RCycles, [RCPU, ARM_Cycles_offset]
-    ldr RCPSR, [RCPU, ARM_CPSR_offset]
-
-    br x1
-
-.p2align 4,,15
-
-.global ARM_Ret
-ARM_Ret:
-    str RCycles, [RCPU, ARM_Cycles_offset]
-    str RCPSR, [RCPU, ARM_CPSR_offset]
-
-    ldp x29, x30, [sp, #80]
-    ldp x27, x28, [sp, #64]
-    ldp x25, x26, [sp, #48]
-    ldp x23, x24, [sp, #32]
-    ldp x21, x22, [sp, #16]
-    ldp x19, x20, [sp], #96
-
-    ret
-
-.p2align 4,,15
-
-.global ARM_RestoreContext
-ARM_RestoreContext:
-    mov sp, x0
-
-    ldp x0, x1, [sp]
-    ldp x2, x3, [sp, #16]
-    ldp x4, x5, [sp, #32]
-    ldp x6, x7, [sp, #48]
-    ldp x8, x9, [sp, #64]
-    ldp x10, x11, [sp, #80]
-    ldp x12, x13, [sp, #96]
-    ldp x14, x15, [sp, #112]
-    ldp x16, x17, [sp, #128]
-    ldp x18, x19, [sp, #144]
-    ldp x20, x21, [sp, #160]
-    ldp x22, x23, [sp, #176]
-    ldp x24, x25, [sp, #192]
-    ldp x26, x27, [sp, #208]
-    ldp x28, x29, [sp, #224]
-    ldr x30, [sp, #240]
-
-    ldp x17, x18, [sp, #248]
-    mov sp, x17
-
-    br x18
\ No newline at end of file
diff --git a/src/ARMJIT_x64/ARMJIT_Linkage.S b/src/ARMJIT_x64/ARMJIT_Linkage.S
new file mode 100644
index 0000000..8cc0b5f
--- /dev/null
+++ b/src/ARMJIT_x64/ARMJIT_Linkage.S
@@ -0,0 +1,88 @@
+.intel_syntax noprefix
+
+#include "ARMJIT_Offsets.h"
+
+.text
+
+#define RCPU rbp
+#define RCPSR r15d
+
+#ifdef WIN64
+#define ARG1_REG ecx
+#define ARG2_REG edx
+#define ARG3_REG r8d
+#define ARG4_REG r9d
+#define ARG1_REG64 rcx
+#define ARG2_REG64 rdx
+#define ARG3_REG64 r8
+#define ARG4_REG64 r9
+#else
+#define ARG1_REG edi
+#define ARG2_REG esi
+#define ARG3_REG edx
+#define ARG4_REG ecx
+#define ARG1_REG64 rdi
+#define ARG2_REG64 rsi
+#define ARG3_REG64 rdx
+#define ARG4_REG64 rcx
+#endif
+
+.p2align 4,,15
+
+#ifdef __APPLE__
+.global _ARM_Dispatch
+_ARM_Dispatch:
+#else
+.global ARM_Dispatch
+ARM_Dispatch:
+#endif
+#ifdef WIN64
+    push rdi
+    push rsi
+#endif
+    push rbx
+    push r12
+    push r13
+    push r14
+    push r15
+    push rbp
+
+#ifdef WIN64
+    sub rsp, 0x28
+#else
+    sub rsp, 0x8
+#endif
+    mov RCPU, ARG1_REG64
+    mov RCPSR, [RCPU + ARM_CPSR_offset]
+
+    jmp ARG2_REG64
+
+.p2align 4,,15
+
+#ifdef __APPLE__
+.global _ARM_Ret
+_ARM_Ret:
+#else
+.global ARM_Ret
+ARM_Ret:
+#endif
+    mov [RCPU + ARM_CPSR_offset], RCPSR
+
+#ifdef WIN64
+    add rsp, 0x28
+#else
+    add rsp, 0x8
+#endif
+
+    pop rbp
+    pop r15
+    pop r14
+    pop r13
+    pop r12
+    pop rbx
+#ifdef WIN64
+    pop rsi
+    pop rdi
+#endif
+
+    ret
diff --git a/src/ARMJIT_x64/ARMJIT_Linkage.s b/src/ARMJIT_x64/ARMJIT_Linkage.s
deleted file mode 100644
index 8cc0b5f..0000000
--- a/src/ARMJIT_x64/ARMJIT_Linkage.s
+++ /dev/null
@@ -1,88 +0,0 @@
-.intel_syntax noprefix
-
-#include "ARMJIT_Offsets.h"
-
-.text
-
-#define RCPU rbp
-#define RCPSR r15d
-
-#ifdef WIN64
-#define ARG1_REG ecx
-#define ARG2_REG edx
-#define ARG3_REG r8d
-#define ARG4_REG r9d
-#define ARG1_REG64 rcx
-#define ARG2_REG64 rdx
-#define ARG3_REG64 r8
-#define ARG4_REG64 r9
-#else
-#define ARG1_REG edi
-#define ARG2_REG esi
-#define ARG3_REG edx
-#define ARG4_REG ecx
-#define ARG1_REG64 rdi
-#define ARG2_REG64 rsi
-#define ARG3_REG64 rdx
-#define ARG4_REG64 rcx
-#endif
-
-.p2align 4,,15
-
-#ifdef __APPLE__
-.global _ARM_Dispatch
-_ARM_Dispatch:
-#else
-.global ARM_Dispatch
-ARM_Dispatch:
-#endif
-#ifdef WIN64
-    push rdi
-    push rsi
-#endif
-    push rbx
-    push r12
-    push r13
-    push r14
-    push r15
-    push rbp
-
-#ifdef WIN64
-    sub rsp, 0x28
-#else
-    sub rsp, 0x8
-#endif
-    mov RCPU, ARG1_REG64
-    mov RCPSR, [RCPU + ARM_CPSR_offset]
-
-    jmp ARG2_REG64
-
-.p2align 4,,15
-
-#ifdef __APPLE__
-.global _ARM_Ret
-_ARM_Ret:
-#else
-.global ARM_Ret
-ARM_Ret:
-#endif
-    mov [RCPU + ARM_CPSR_offset], RCPSR
-
-#ifdef WIN64
-    add rsp, 0x28
-#else
-    add rsp, 0x8
-#endif
-
-    pop rbp
-    pop r15
-    pop r14
-    pop r13
-    pop r12
-    pop rbx
-#ifdef WIN64
-    pop rsi
-    pop rdi
-#endif
-
-    ret
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 446480d..c16da9f 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -80,9 +80,8 @@ if (ENABLE_JIT)
 			ARMJIT_x64/ARMJIT_LoadStore.cpp
 			ARMJIT_x64/ARMJIT_Branch.cpp
 
-			ARMJIT_x64/ARMJIT_Linkage.s
+			ARMJIT_x64/ARMJIT_Linkage.S
 		)
-		set_source_files_properties(ARMJIT_x64/ARMJIT_Linkage.s PROPERTIES COMPILE_FLAGS "-x assembler-with-cpp")
 	endif()
 	if (ARCHITECTURE STREQUAL ARM64)
 		target_sources(core PRIVATE
@@ -94,9 +93,8 @@ if (ENABLE_JIT)
 			ARMJIT_A64/ARMJIT_LoadStore.cpp
 			ARMJIT_A64/ARMJIT_Branch.cpp
 
-			ARMJIT_A64/ARMJIT_Linkage.s
+			ARMJIT_A64/ARMJIT_Linkage.S
 		)
-		set_source_files_properties(ARMJIT_A64/ARMJIT_Linkage.s PROPERTIES COMPILE_FLAGS "-x assembler-with-cpp")
 	endif()
 endif()
 
-- 
cgit v1.2.3