From c5e14074c3b999d09b8a8612cfa7f011423e83ab Mon Sep 17 00:00:00 2001 From: Arisotura Date: Wed, 3 Jul 2019 12:37:34 +0200 Subject: * add SCFG_EXT * quick hack to detect cartridges --- src/NDSCart.cpp | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'src/NDSCart.cpp') diff --git a/src/NDSCart.cpp b/src/NDSCart.cpp index 0ecd304..0bb8b5c 100644 --- a/src/NDSCart.cpp +++ b/src/NDSCart.cpp @@ -19,6 +19,7 @@ #include #include #include "NDS.h" +#include "DSi.h" #include "NDSCart.h" #include "ARM.h" #include "CRC32.h" @@ -558,7 +559,8 @@ void Key1_ApplyKeycode(u32* keycode, u32 mod) void Key1_InitKeycode(u32 idcode, u32 level, u32 mod) { - memcpy(Key1_KeyBuf, &NDS::ARM7BIOS[0x30], 0x1048); // hax + //memcpy(Key1_KeyBuf, &NDS::ARM7BIOS[0x30], 0x1048); // hax + memcpy(Key1_KeyBuf, &DSi::ITCMInit[0x4894], 0x1048); // hax u32 keycode[3] = {idcode, idcode>>1, idcode<<1}; if (level >= 1) Key1_ApplyKeycode(keycode, mod); @@ -1185,11 +1187,11 @@ void WriteROMCnt(u32 val) *(u32*)&cmd[4] = *(u32*)&ROMCommand[4]; } - /*printf("ROM COMMAND %04X %08X %02X%02X%02X%02X%02X%02X%02X%02X SIZE %04X\n", + printf("ROM COMMAND %04X %08X %02X%02X%02X%02X%02X%02X%02X%02X SIZE %04X\n", SPICnt, ROMCnt, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4], cmd[5], cmd[6], cmd[7], - datasize);*/ + datasize); switch (cmd[0]) { -- cgit v1.2.3 From 36c741241a3efbfeb81a447c53917b1ab586fe73 Mon Sep 17 00:00:00 2001 From: Arisotura Date: Sun, 4 Aug 2019 16:46:02 +0200 Subject: support DSi-mode carts except they need to have the DSi-mode shit encrypted --- src/DSi.cpp | 27 ++++++++++++------ src/DSi.h | 1 + src/DSi_SD.cpp | 4 +-- src/NDSCart.cpp | 87 ++++++++++++++++++++++++++++++++++++++++----------------- src/NDSCart.h | 2 ++ 5 files changed, 85 insertions(+), 36 deletions(-) (limited to 'src/NDSCart.cpp') diff --git a/src/DSi.cpp b/src/DSi.cpp index 17d7f0d..771f67b 100644 --- a/src/DSi.cpp +++ b/src/DSi.cpp @@ -22,6 +22,7 @@ #include "DSi.h" #include "ARM.h" #include "GPU.h" +#include "NDSCart.h" #include "Platform.h" #include "DSi_NDMA.h" @@ -581,6 +582,22 @@ void MapNWRAMRange(u32 cpu, u32 num, u32 val) } +void Set_SCFG_MC(u32 val) +{ + u32 oldslotstatus = SCFG_MC & 0xC; + + val &= 0xFFFF800C; + if ((val & 0xC) == 0xC) val &= ~0xC; // hax + if (val & 0x8000) printf("SCFG_MC: weird NDS slot swap\n"); + SCFG_MC = (SCFG_MC & ~0xFFFF800C) | val; + + if ((oldslotstatus == 0x0) && ((SCFG_MC & 0xC) == 0x4)) + { + NDSCart::ResetCart(); + } +} + + u8 ARM9Read8(u32 addr) { switch (addr & 0xFF000000) @@ -1455,10 +1472,7 @@ void ARM7IOWrite16(u32 addr, u16 val) return; case 0x04004010: - val &= 0x800C; - if ((val & 0xC) == 0xC) val &= ~0xC; // hax - if (val & 0x8000) printf("SCFG_MC: weird NDS slot swap\n"); - SCFG_MC = (SCFG_MC & ~0x800C) | val; + Set_SCFG_MC((SCFG_MC & 0xFFFF0000) | val); return; } @@ -1491,10 +1505,7 @@ void ARM7IOWrite32(u32 addr, u32 val) printf("SCFG_EXT = %08X / %08X (val7 %08X)\n", SCFG_EXT[0], SCFG_EXT[1], val); return; case 0x04004010: - val &= 0xFFFF800C; - if ((val & 0xC) == 0xC) val &= ~0xC; // hax - if (val & 0x8000) printf("SCFG_MC: weird NDS slot swap\n"); - SCFG_MC = (SCFG_MC & ~0xFFFF800C) | val; + Set_SCFG_MC(val); return; case 0x04004054: MapNWRAMRange(1, 0, val); return; diff --git a/src/DSi.h b/src/DSi.h index db585b4..b29cdb5 100644 --- a/src/DSi.h +++ b/src/DSi.h @@ -32,6 +32,7 @@ extern DSi_SDHost* SDMMC; extern DSi_SDHost* SDIO; extern u8 ITCMInit[0x8000]; +extern u8 ARM7Init[0x3C00]; bool Init(); diff --git a/src/DSi_SD.cpp b/src/DSi_SD.cpp index 07eca83..44d8d62 100644 --- a/src/DSi_SD.cpp +++ b/src/DSi_SD.cpp @@ -191,7 +191,7 @@ void DSi_SDHost::FinishSend(u32 param) u32 DSi_SDHost::SendData(u8* data, u32 len) { - printf("%s: data RX, len=%d, blkcnt=%d (%d) blklen=%d, irq=%08X\n", SD_DESC, len, BlockCount16, BlockCountInternal, BlockLen16, IRQMask); + //printf("%s: data RX, len=%d, blkcnt=%d (%d) blklen=%d, irq=%08X\n", SD_DESC, len, BlockCount16, BlockCountInternal, BlockLen16, IRQMask); if (len != BlockLen16) { printf("!! BAD BLOCKLEN\n"); len = BlockLen16; } bool last = (BlockCountInternal == 0); @@ -796,7 +796,7 @@ void DSi_MMCStorage::ContinueTransfer() u32 DSi_MMCStorage::ReadBlock(u64 addr) { - printf("SD/MMC: reading block @ %08X, len=%08X\n", addr, BlockSize); + //printf("SD/MMC: reading block @ %08X, len=%08X\n", addr, BlockSize); u32 len = BlockSize; len = Host->GetTransferrableLen(len); diff --git a/src/NDSCart.cpp b/src/NDSCart.cpp index 0bb8b5c..c3765d8 100644 --- a/src/NDSCart.cpp +++ b/src/NDSCart.cpp @@ -475,6 +475,7 @@ u32 CartROMSize; u32 CartCRC; u32 CartID; bool CartIsHomebrew; +bool CartIsDSi; u32 CmdEncMode; u32 DataEncMode; @@ -557,10 +558,13 @@ void Key1_ApplyKeycode(u32* keycode, u32 mod) } } -void Key1_InitKeycode(u32 idcode, u32 level, u32 mod) +void Key1_InitKeycode(bool dsi, u32 idcode, u32 level, u32 mod) { //memcpy(Key1_KeyBuf, &NDS::ARM7BIOS[0x30], 0x1048); // hax - memcpy(Key1_KeyBuf, &DSi::ITCMInit[0x4894], 0x1048); // hax + if (dsi) + memcpy(Key1_KeyBuf, &DSi::ARM7Init[0x254], 0x1048); // hax + else + memcpy(Key1_KeyBuf, &DSi::ITCMInit[0x4894], 0x1048); // hax u32 keycode[3] = {idcode, idcode>>1, idcode<<1}; if (level >= 1) Key1_ApplyKeycode(keycode, mod); @@ -613,32 +617,19 @@ void DeInit() void Reset() { - SPICnt = 0; - ROMCnt = 0; - - memset(ROMCommand, 0, 8); - ROMDataOut = 0; - - Key2_X = 0; - Key2_Y = 0; - - memset(DataOut, 0, 0x4000); - DataOutPos = 0; - DataOutLen = 0; - CartInserted = false; if (CartROM) delete[] CartROM; CartROM = NULL; CartROMSize = 0; CartID = 0; CartIsHomebrew = false; + CartIsDSi = false; ROMCommandHandler = NULL; - CmdEncMode = 0; - DataEncMode = 0; - NDSCart_SRAM::Reset(); + + ResetCart(); } void DoSavestate(Savestate* file) @@ -893,6 +884,11 @@ bool LoadROM(const char* path, const char* sram, bool direct) fread(&gamecode, 4, 1, f); printf("Game code: %c%c%c%c\n", gamecode&0xFF, (gamecode>>8)&0xFF, (gamecode>>16)&0xFF, gamecode>>24); + u8 unitcode; + fseek(f, 0x12, SEEK_SET); + fread(&unitcode, 1, 1, f); + CartIsDSi = (unitcode & 0x02) != 0; + CartROM = new u8[CartROMSize]; memset(CartROM, 0, CartROMSize); fseek(f, 0, SEEK_SET); @@ -934,6 +930,9 @@ bool LoadROM(const char* path, const char* sram, bool direct) if (romparams[1] == 8) CartID |= 0x08000000; // NAND flag + if (CartIsDSi) + CartID |= 0x40000000; + printf("Cart ID: %08X\n", CartID); if (*(u32*)&CartROM[0x20] < 0x4000) @@ -969,11 +968,11 @@ bool LoadROM(const char* path, const char* sram, bool direct) strncpy((char*)&CartROM[arm9base], "encryObj", 8); - Key1_InitKeycode(gamecode, 3, 2); + Key1_InitKeycode(false, gamecode, 3, 2); for (u32 i = 0; i < 0x800; i += 8) Key1_Encrypt((u32*)&CartROM[arm9base + i]); - Key1_InitKeycode(gamecode, 2, 2); + Key1_InitKeycode(false, gamecode, 2, 2); Key1_Encrypt((u32*)&CartROM[arm9base]); } } @@ -981,9 +980,6 @@ bool LoadROM(const char* path, const char* sram, bool direct) CartIsHomebrew = true; } - // encryption - Key1_InitKeycode(gamecode, 2, 2); - // save printf("Save file: %s\n", sram); @@ -998,6 +994,27 @@ void RelocateSave(const char* path, bool write) NDSCart_SRAM::RelocateSave(path, write); } +void ResetCart() +{ + // CHECKME: what if there is a transfer in progress? + + SPICnt = 0; + ROMCnt = 0; + + memset(ROMCommand, 0, 8); + ROMDataOut = 0; + + Key2_X = 0; + Key2_Y = 0; + + memset(DataOut, 0, 0x4000); + DataOutPos = 0; + DataOutLen = 0; + + CmdEncMode = 0; + DataEncMode = 0; +} + void ReadROM(u32 addr, u32 len, u32 offset) { if (!CartInserted) return; @@ -1172,7 +1189,7 @@ void WriteROMCnt(u32 val) // handle KEY1 encryption as needed. // KEY2 encryption is implemented in hardware and doesn't need to be handled. u8 cmd[8]; - if (CmdEncMode == 1) + if (CmdEncMode == 1 || CmdEncMode == 11) { *(u32*)&cmd[0] = ByteSwap(*(u32*)&ROMCommand[4]); *(u32*)&cmd[4] = ByteSwap(*(u32*)&ROMCommand[0]); @@ -1218,11 +1235,23 @@ void WriteROMCnt(u32 val) break; case 0x3C: - if (CartInserted) CmdEncMode = 1; + if (CartInserted) + { + CmdEncMode = 1; + Key1_InitKeycode(false, *(u32*)&CartROM[0xC], 2, 2); + } + break; + + case 0x3D: + if (CartInserted && CartIsDSi) + { + CmdEncMode = 11; + Key1_InitKeycode(true, *(u32*)&CartROM[0xC], 1, 2); + } break; default: - if (CmdEncMode == 1) + if (CmdEncMode == 1 || CmdEncMode == 11) { switch (cmd[0] & 0xF0) { @@ -1238,6 +1267,12 @@ void WriteROMCnt(u32 val) case 0x20: { u32 addr = (cmd[2] & 0xF0) << 8; + if (CmdEncMode == 11) + { + u32 arm9i_base = *(u32*)&CartROM[0x1C0]; + addr -= 0x4000; + addr += arm9i_base; + } ReadROM(addr, 0x1000, 0); } break; diff --git a/src/NDSCart.h b/src/NDSCart.h index 0dc4220..05516d7 100644 --- a/src/NDSCart.h +++ b/src/NDSCart.h @@ -47,6 +47,8 @@ void DoSavestate(Savestate* file); bool LoadROM(const char* path, const char* sram, bool direct); void RelocateSave(const char* path, bool write); +void ResetCart(); + void WriteROMCnt(u32 val); u32 ReadROMData(); -- cgit v1.2.3 From dcda848cdfd94aaa5549841d8ba3cb54370f9cbc Mon Sep 17 00:00:00 2001 From: Arisotura Date: Wed, 7 Aug 2019 12:57:12 +0200 Subject: * base for potentially re-encrypting modcrypt, doesn't seem to be required? but can also serve to decrypt it * revise SD IRQ behavior (fixing potential hang when loading DS games) --- src/DSi_AES.cpp | 61 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++- src/DSi_AES.h | 3 +++ src/DSi_SD.cpp | 29 ++++++++++++++++++++++----- src/DSi_SD.h | 1 + src/NDSCart.cpp | 23 ++++++++++++++++++++++ 5 files changed, 111 insertions(+), 6 deletions(-) (limited to 'src/NDSCart.cpp') diff --git a/src/DSi_AES.cpp b/src/DSi_AES.cpp index 4aa97bc..e49ebf5 100644 --- a/src/DSi_AES.cpp +++ b/src/DSi_AES.cpp @@ -398,7 +398,7 @@ void Update() { Ctx.Iv[13] = 0x00; Ctx.Iv[14] = 0x00; - Ctx.Iv[15] = 0x00;_printhex(Ctx.Iv, 16); + Ctx.Iv[15] = 0x00; AES_CTR_xcrypt_buffer(&Ctx, CurMAC, 16); //printf("FINAL MAC: "); _printhexR(CurMAC, 16); @@ -505,4 +505,63 @@ void WriteKeyY(u32 slot, u32 offset, u32 val, u32 mask) } } + +// utility + +void GetModcryptKey(u8* romheader, u8* key) +{ + if ((romheader[0x01C] & 0x04) || (romheader[0x1BF] & 0x80)) + { + // dev key + memcpy(key, &romheader[0x000], 16); + return; + } + + u8 oldkeys[16*3]; + memcpy(&oldkeys[16*0], KeyX[0], 16); + memcpy(&oldkeys[16*1], KeyY[0], 16); + memcpy(&oldkeys[16*2], KeyNormal[0], 16); + + KeyX[0][8] = romheader[0x00C]; + KeyX[0][9] = romheader[0x00D]; + KeyX[0][10] = romheader[0x00E]; + KeyX[0][11] = romheader[0x00F]; + KeyX[0][12] = romheader[0x00F]; + KeyX[0][13] = romheader[0x00E]; + KeyX[0][14] = romheader[0x00D]; + KeyX[0][15] = romheader[0x00C]; + + memcpy(KeyY[0], &romheader[0x350], 16); + + DeriveNormalKey(0); + memcpy(key, KeyNormal[0], 16); + + memcpy(KeyX[0], &oldkeys[16*0], 16); + memcpy(KeyY[0], &oldkeys[16*1], 16); + memcpy(KeyNormal[0], &oldkeys[16*2], 16); +} + +void ApplyModcrypt(u8* data, u32 len, u8* key, u8* iv) +{ + u8 key_rev[16], iv_rev[16]; + u8 data_rev[16]; + u8 oldkeys[16*2]; + memcpy(&oldkeys[16*0], Ctx.RoundKey, 16); + memcpy(&oldkeys[16*1], Ctx.Iv, 16); + + Swap16(key_rev, key); + Swap16(iv_rev, iv); + AES_init_ctx_iv(&Ctx, key_rev, iv_rev); + + for (u32 i = 0; i < len; i += 16) + { + Swap16(data_rev, &data[i]); + AES_CTR_xcrypt_buffer(&Ctx, data_rev, 16); + Swap16(&data[i], data_rev); + } + + memcpy(Ctx.RoundKey, &oldkeys[16*0], 16); + memcpy(Ctx.Iv, &oldkeys[16*1], 16); +} + } diff --git a/src/DSi_AES.h b/src/DSi_AES.h index 5e726cd..354c4a7 100644 --- a/src/DSi_AES.h +++ b/src/DSi_AES.h @@ -46,6 +46,9 @@ void WriteKeyNormal(u32 slot, u32 offset, u32 val, u32 mask); void WriteKeyX(u32 slot, u32 offset, u32 val, u32 mask); void WriteKeyY(u32 slot, u32 offset, u32 val, u32 mask); +void GetModcryptKey(u8* romheader, u8* key); +void ApplyModcrypt(u8* data, u32 len, u8* key, u8* iv); + } #endif // DSI_AES_H diff --git a/src/DSi_SD.cpp b/src/DSi_SD.cpp index 44d8d62..796466d 100644 --- a/src/DSi_SD.cpp +++ b/src/DSi_SD.cpp @@ -149,6 +149,15 @@ void DSi_SDHost::SetIRQ(u32 irq) if (irq == 24 || irq == 25) UpdateData32IRQ(); } +void DSi_SDHost::UpdateIRQ(u32 oldmask) +{ + u32 oldflags = IRQStatus & ~oldmask; + u32 newflags = IRQStatus & ~IRQMask; + + if ((oldflags == 0) && (newflags != 0)) + NDS::SetIRQ2(Num ? NDS::IRQ2_DSi_SDIO : NDS::IRQ2_DSi_SDMMC); +} + void DSi_SDHost::SetCardIRQ() { if (!(CardIRQCtl & (1<<0))) return; @@ -424,7 +433,7 @@ u32 DSi_SDHost::ReadFIFO32() return ret; } -int morp = 0; + void DSi_SDHost::Write(u32 addr, u16 val) { //if(Num)printf("SDIO WRITE %08X %04X %08X\n", addr, val, NDS::GetPC(1)); @@ -464,11 +473,21 @@ void DSi_SDHost::Write(u32 addr, u16 val) case 0x01C: IRQStatus &= (val | 0xFFFF0000); return; case 0x01E: IRQStatus &= ((val << 16) | 0xFFFF); return; - case 0x020: IRQMask = (IRQMask & 0x8B7F0000) | (val & 0x031D); return; + case 0x020: + { + u32 oldmask = IRQMask; + IRQMask = (IRQMask & 0x8B7F0000) | (val & 0x031D); + UpdateIRQ(oldmask); + } + return; case 0x022: - IRQMask = (IRQMask & 0x0000031D) | ((val & 0x8B7F) << 16); - if (!DataFIFO[CurFIFO]->IsEmpty()) SetIRQ(24); // checkme - if (DataFIFO[CurFIFO]->IsEmpty()) SetIRQ(25); // checkme + { + u32 oldmask = IRQMask; + IRQMask = (IRQMask & 0x0000031D) | ((val & 0x8B7F) << 16); + UpdateIRQ(oldmask); + if (!DataFIFO[CurFIFO]->IsEmpty()) SetIRQ(24); // checkme + if (DataFIFO[CurFIFO]->IsEmpty()) SetIRQ(25); // checkme + } return; case 0x024: SDClock = val & 0x03FF; return; diff --git a/src/DSi_SD.h b/src/DSi_SD.h index 149b72a..f4ca26c 100644 --- a/src/DSi_SD.h +++ b/src/DSi_SD.h @@ -84,6 +84,7 @@ private: void UpdateData32IRQ(); void ClearIRQ(u32 irq); void SetIRQ(u32 irq); + void UpdateIRQ(u32 oldmask); }; diff --git a/src/NDSCart.cpp b/src/NDSCart.cpp index c3765d8..65cf8ae 100644 --- a/src/NDSCart.cpp +++ b/src/NDSCart.cpp @@ -23,6 +23,7 @@ #include "NDSCart.h" #include "ARM.h" #include "CRC32.h" +#include "DSi_AES.h" #include "Platform.h" @@ -599,6 +600,15 @@ void Key2_Encrypt(u8* data, u32 len) } +void ApplyModcrypt(u32 addr, u32 len, u8* iv) +{return; + u8 key[16]; + + DSi_AES::GetModcryptKey(&CartROM[0], key); + DSi_AES::ApplyModcrypt(&CartROM[addr], len, key, iv); +} + + bool Init() { if (!NDSCart_SRAM::Init()) return false; @@ -980,6 +990,19 @@ bool LoadROM(const char* path, const char* sram, bool direct) CartIsHomebrew = true; } + // re-encrypt modcrypt areas if needed + // TODO: somehow detect whether those are already encrypted + if (true) + { + u32 mod1 = *(u32*)&CartROM[0x220]; + u32 mod2 = *(u32*)&CartROM[0x228]; + + printf("Re-encrypting modcrypt areas: %08X, %08X\n", mod1, mod2); + + if (mod1) ApplyModcrypt(mod1, *(u32*)&CartROM[0x224], &CartROM[0x300]); + if (mod2) ApplyModcrypt(mod2, *(u32*)&CartROM[0x22C], &CartROM[0x314]); + } + // save printf("Save file: %s\n", sram); -- cgit v1.2.3 From e82364f010f6ad4e4883c241a05a4aac10cd75d6 Mon Sep 17 00:00:00 2001 From: Arisotura Date: Sat, 19 Oct 2019 16:03:59 +0200 Subject: * some fixes to SD controller support, make it clear that there is no SD inserted, makes Flipnote work somewhat better * immediately clear AES busy flag when the block count is zero (occurs when loading DSi cart games) * implement NDMA start modes that have an old-DMA equivalent (except for GXFIFO mode) now it boots DSi carts! --- src/DSi.cpp | 16 +++++++++- src/DSi.h | 1 + src/DSi_AES.cpp | 90 +++++++++++++++++++++++++------------------------------- src/DSi_NDMA.cpp | 6 ++-- src/DSi_SD.cpp | 62 +++++++++++++++++++++++++++++++++----- src/NDS.cpp | 42 ++++++++++++++++++++++++++ src/NDSCart.cpp | 4 +-- 7 files changed, 159 insertions(+), 62 deletions(-) (limited to 'src/NDSCart.cpp') diff --git a/src/DSi.cpp b/src/DSi.cpp index 9f07fa1..ef4e6da 100644 --- a/src/DSi.cpp +++ b/src/DSi.cpp @@ -411,6 +411,16 @@ void StallNDMAs() // TODO } +bool NDMAsInMode(u32 cpu, u32 mode) +{ + cpu <<= 2; + if (NDMAs[cpu+0]->IsInMode(mode)) return true; + if (NDMAs[cpu+1]->IsInMode(mode)) return true; + if (NDMAs[cpu+2]->IsInMode(mode)) return true; + if (NDMAs[cpu+3]->IsInMode(mode)) return true; + return false; +} + bool NDMAsRunning(u32 cpu) { cpu <<= 2; @@ -1156,7 +1166,7 @@ u8 ARM9IORead8(u32 addr) return NDS::ARM9IORead8(addr); } - +//u16 dicks = 0; u16 ARM9IORead16(u32 addr) { switch (addr) @@ -1174,6 +1184,8 @@ u16 ARM9IORead16(u32 addr) CASE_READ16_32BIT(0x04004058, MBK[0][6]) CASE_READ16_32BIT(0x0400405C, MBK[0][7]) CASE_READ16_32BIT(0x04004060, MBK[0][8]) + + //case 0x04004202: return dicks & 0xEF1F; } return NDS::ARM9IORead16(addr); @@ -1318,6 +1330,8 @@ void ARM9IOWrite16(u32 addr, u16 val) MapNWRAM_C(6, val & 0xFF); MapNWRAM_C(7, val >> 8); return; + + //case 0x04004202: dicks = val & 0xEF3F; return; } return NDS::ARM9IOWrite16(addr, val); diff --git a/src/DSi.h b/src/DSi.h index bd37550..5697237 100644 --- a/src/DSi.h +++ b/src/DSi.h @@ -47,6 +47,7 @@ bool LoadNAND(); void RunNDMAs(u32 cpu); void StallNDMAs(); +bool NDMAsInMode(u32 cpu, u32 mode); bool NDMAsRunning(u32 cpu); void CheckNDMAs(u32 cpu, u32 mode); void StopNDMAs(u32 cpu, u32 mode); diff --git a/src/DSi_AES.cpp b/src/DSi_AES.cpp index e49ebf5..7aae8f3 100644 --- a/src/DSi_AES.cpp +++ b/src/DSi_AES.cpp @@ -129,28 +129,8 @@ void Reset() memset(CurKey, 0, sizeof(CurKey)); memset(CurMAC, 0, sizeof(CurMAC)); - // initialize keys, as per GBAtek - -#if 0 - // slot 0: modcrypt - *(u32*)&KeyX[0][0] = 0x746E694E; - *(u32*)&KeyX[0][4] = 0x6F646E65; - - // slot 1: 'Tad'/dev.kp - *(u32*)&KeyX[1][0] = 0x4E00004A; - *(u32*)&KeyX[1][4] = 0x4A00004E; - *(u32*)&KeyX[1][8] = (u32)(DSi::ConsoleID >> 32) ^ 0xC80C4B72; - *(u32*)&KeyX[1][12] = (u32)DSi::ConsoleID; - - // slot 3: console-unique eMMC crypto - *(u32*)&KeyX[3][0] = (u32)DSi::ConsoleID; - *(u32*)&KeyX[3][4] = (u32)DSi::ConsoleID ^ 0x24EE6906; - *(u32*)&KeyX[3][8] = (u32)(DSi::ConsoleID >> 32) ^ 0xE65B601D; - *(u32*)&KeyX[3][12] = (u32)(DSi::ConsoleID >> 32); - *(u32*)&KeyY[3][0] = 0x0AB9DC76; - *(u32*)&KeyY[3][4] = 0xBD4DC4D3; - *(u32*)&KeyY[3][8] = 0x202DDD1D; -#endif + // initialize keys + FILE* f = Platform::OpenLocalFile("aeskeys.bin", "rb"); if (f) { @@ -233,12 +213,12 @@ u32 ReadCnt() ret |= InputFIFO->Level(); ret |= (OutputFIFO->Level() << 5); - +//printf("READ AES CNT: %08X, LEVELS: IN=%d OUT=%d\n", ret, InputFIFO->Level(), OutputFIFO->Level()); return ret; } void WriteCnt(u32 val) -{ +{printf("AES CNT = %08X\n", val); u32 oldcnt = Cnt; Cnt = val & 0xFC1FF000; @@ -267,41 +247,51 @@ void WriteCnt(u32 val) // transfer start (checkme) RemBlocks = BlkCnt >> 16; - u8 key[16]; - u8 iv[16]; + if (RemBlocks > 0) + { + u8 key[16]; + u8 iv[16]; - Swap16(key, CurKey); - Swap16(iv, IV); + Swap16(key, CurKey); + Swap16(iv, IV); - if (AESMode < 2) - { - if (BlkCnt & 0xFFFF) printf("AES: CCM EXTRA LEN TODO\n"); + if (AESMode < 2) + { + if (BlkCnt & 0xFFFF) printf("AES: CCM EXTRA LEN TODO\n"); - u32 maclen = (val >> 16) & 0x7; - if (maclen < 1) maclen = 1; + u32 maclen = (val >> 16) & 0x7; + if (maclen < 1) maclen = 1; - iv[0] = 0x02; - for (int i = 0; i < 12; i++) iv[1+i] = iv[4+i]; - iv[13] = 0x00; - iv[14] = 0x00; - iv[15] = 0x01; + iv[0] = 0x02; + for (int i = 0; i < 12; i++) iv[1+i] = iv[4+i]; + iv[13] = 0x00; + iv[14] = 0x00; + iv[15] = 0x01; - AES_init_ctx_iv(&Ctx, key, iv); + AES_init_ctx_iv(&Ctx, key, iv); - iv[0] |= (maclen << 3) | ((BlkCnt & 0xFFFF) ? (1<<6) : 0); - iv[13] = RemBlocks >> 12; - iv[14] = RemBlocks >> 4; - iv[15] = RemBlocks << 4; + iv[0] |= (maclen << 3) | ((BlkCnt & 0xFFFF) ? (1<<6) : 0); + iv[13] = RemBlocks >> 12; + iv[14] = RemBlocks >> 4; + iv[15] = RemBlocks << 4; - memcpy(CurMAC, iv, 16); - AES_ECB_encrypt(&Ctx, CurMAC); + memcpy(CurMAC, iv, 16); + AES_ECB_encrypt(&Ctx, CurMAC); + } + else + { + AES_init_ctx_iv(&Ctx, key, iv); + } + + DSi::CheckNDMAs(1, 0x2A); } else { - AES_init_ctx_iv(&Ctx, key, iv); - } + // no blocks to process? oh well. mark it finished + // CHECKME: does this trigger any IRQ or shit? - DSi::CheckNDMAs(1, 0x2A); + Cnt &= ~(1<<31); + } } printf("AES CNT: %08X / mode=%d key=%d inDMA=%d outDMA=%d blocks=%d\n", @@ -309,7 +299,7 @@ void WriteCnt(u32 val) } void WriteBlkCnt(u32 val) -{ +{printf("AES BLOCK CNT %08X / %d\n", val, val>>16); BlkCnt = val; } @@ -415,7 +405,7 @@ void Update() // CHECKME Cnt &= ~(1<<21); } - +printf("AES: FINISHED\n"); Cnt &= ~(1<<31); if (Cnt & (1<<30)) NDS::SetIRQ2(NDS::IRQ2_DSi_AES); DSi::StopNDMAs(1, 0x2A); diff --git a/src/DSi_NDMA.cpp b/src/DSi_NDMA.cpp index e7fc7ab..19c72b6 100644 --- a/src/DSi_NDMA.cpp +++ b/src/DSi_NDMA.cpp @@ -101,8 +101,10 @@ void DSi_NDMA::WriteCnt(u32 val) Start(); if (StartMode != 0x10 && StartMode != 0x30 && - StartMode != 0x2A && StartMode != 0x2B) - printf("UNIMPLEMENTED ARM%d NDMA%d START MODE %02X, %08X->%08X\n", CPU?7:9, Num, StartMode, SrcAddr, DstAddr); + StartMode != 0x04 && StartMode != 0x06 && StartMode != 0x07 && StartMode != 0x08 && StartMode != 0x09 && + StartMode != 0x24 && StartMode != 0x26 && StartMode != 0x28 && StartMode != 0x29 && StartMode != 0x2A && StartMode != 0x2B) + printf("UNIMPLEMENTED ARM%d NDMA%d START MODE %02X, %08X->%08X LEN=%d BLK=%d CNT=%08X\n", + CPU?7:9, Num, StartMode, SrcAddr, DstAddr, TotalLength, BlockLength, Cnt); } } diff --git a/src/DSi_SD.cpp b/src/DSi_SD.cpp index 796466d..a45a8ce 100644 --- a/src/DSi_SD.cpp +++ b/src/DSi_SD.cpp @@ -91,10 +91,16 @@ void DSi_SDHost::Reset() if (Num == 0) { + // TODO: eventually pull from host filesystem + /*DSi_MMCStorage* sd = new DSi_MMCStorage(this, false, "sd.bin"); + u8 sd_cid[16] = {0xBD, 0x12, 0x34, 0x56, 0x78, 0x03, 0x4D, 0x30, 0x30, 0x46, 0x50, 0x41, 0x00, 0x00, 0x15, 0x00}; + sd->SetCID(sd_cid);*/ + DSi_MMCStorage* sd = NULL; + DSi_MMCStorage* mmc = new DSi_MMCStorage(this, true, "nand.bin"); mmc->SetCID(DSi::eMMC_CID); - // TODO: port 0 (SD) + Ports[0] = sd; Ports[1] = mmc; } else @@ -196,6 +202,14 @@ void DSi_SDHost::FinishSend(u32 param) host->ClearIRQ(25); host->SetIRQ(24); //if (param & 0x2) host->SetIRQ(2); + + // TODO: this is an assumption and should eventually be confirmed + // Flipnote sets DMA blocklen to 128 words and totallen to 1024 words + // so, presumably, DMA should trigger when the FIFO is full + // 'full' being when it reaches whatever BlockLen16 is set to, or the + // other blocklen register, or when it is actually full (but that makes + // less sense) + DSi::CheckNDMAs(1, host->Num ? 0x29 : 0x28); } u32 DSi_SDHost::SendData(u8* data, u32 len) @@ -286,7 +300,7 @@ u32 DSi_SDHost::GetTransferrableLen(u32 len) u16 DSi_SDHost::Read(u32 addr) { - //if(Num)printf("SDIO READ %08X %08X\n", addr, NDS::GetPC(1)); + if(!Num)printf("SDMMC READ %08X %08X\n", addr, NDS::GetPC(1)); switch (addr & 0x1FF) { @@ -307,7 +321,24 @@ u16 DSi_SDHost::Read(u32 addr) case 0x018: return ResponseBuffer[6]; case 0x01A: return ResponseBuffer[7]; - case 0x01C: return (IRQStatus & 0x031D) | 0x0030; // TODO: adjust insert flags for SD card + case 0x01C: + { + u16 ret = (IRQStatus & 0x031D); + + if (!Num) + { + if (Ports[0]) // basic check of whether the SD card is inserted + ret |= 0x0030; + else + ret |= 0x0008; + } + else + { + // SDIO wifi is always inserted, I guess + ret |= 0x0030; + } + return ret; + } case 0x01E: return ((IRQStatus >> 16) & 0x8B7F); case 0x020: return IRQMask & 0x031D; case 0x022: return (IRQMask >> 16) & 0x8B7F; @@ -436,7 +467,7 @@ u32 DSi_SDHost::ReadFIFO32() void DSi_SDHost::Write(u32 addr, u16 val) { - //if(Num)printf("SDIO WRITE %08X %04X %08X\n", addr, val, NDS::GetPC(1)); + if(!Num)printf("SDMMC WRITE %08X %04X %08X\n", addr, val, NDS::GetPC(1)); switch (addr & 0x1FF) { @@ -464,7 +495,7 @@ void DSi_SDHost::Write(u32 addr, u16 val) } return; - case 0x002: PortSelect = val; printf("%s: PORT SELECT %04X\n", SD_DESC, val); return; + case 0x002: PortSelect = (val & 0x040F) | (PortSelect & 0x0300); printf("%s: PORT SELECT %04X (%04X)\n", SD_DESC, val, PortSelect); return; case 0x004: Param = (Param & 0xFFFF0000) | val; return; case 0x006: Param = (Param & 0x0000FFFF) | (val << 16); return; @@ -504,7 +535,7 @@ void DSi_SDHost::Write(u32 addr, u16 val) if (DataFIFO[f]->IsFull()) { // TODO - printf("!!!! %s FIFO FULL\n", SD_DESC); + printf("!!!! %s FIFO (16) FULL\n", SD_DESC); return; } @@ -582,12 +613,14 @@ void DSi_SDHost::WriteFIFO32(u32 val) { if (DataMode != 1) return; + printf("%s: WRITE FIFO32: LEVEL=%d/%d\n", SD_DESC, DataFIFO[CurFIFO]->Level(), (BlockLen16>>1)); + DSi_SDDevice* dev = Ports[PortSelect & 0x1]; u32 f = CurFIFO; if (DataFIFO[f]->IsFull()) { // TODO - printf("!!!! %s FIFO FULL\n", SD_DESC); + printf("!!!! %s FIFO (32) FULL\n", SD_DESC); return; } @@ -608,12 +641,26 @@ void DSi_SDHost::WriteFIFO32(u32 val) } +#define MMC_DESC (Internal?"NAND":"SDcard") + DSi_MMCStorage::DSi_MMCStorage(DSi_SDHost* host, bool internal, const char* path) : DSi_SDDevice(host) { Internal = internal; strncpy(FilePath, path, 1023); FilePath[1023] = '\0'; File = Platform::OpenLocalFile(path, "r+b"); + if (!File) + { + if (internal) + { + // TODO: proper failure + printf("!! MMC file %s does not exist\n", path); + } + else + { + File = Platform::OpenLocalFile(path, "w+b"); + } + } CSR = 0x00000100; // checkme @@ -674,6 +721,7 @@ void DSi_MMCStorage::SendCMD(u8 cmd, u32 param) { // TODO printf("CMD3 on SD card: TODO\n"); + Host->SendResponse((CSR & 0x1FFF) | ((CSR >> 6) & 0x2000) | ((CSR >> 8) & 0xC000) | (1 << 16), true); } return; diff --git a/src/NDS.cpp b/src/NDS.cpp index 95265cf..6933e95 100644 --- a/src/NDS.cpp +++ b/src/NDS.cpp @@ -1371,6 +1371,29 @@ void RunTimers(u32 cpu) +// matching NDMA modes for DSi +const u32 NDMAModes[] = +{ + // ARM9 + + 0x10, // immediate + 0x06, // VBlank + 0x07, // HBlank + 0x08, // scanline start + 0x09, // mainmem FIFO + 0x04, // DS cart slot + 0xFF, // GBA cart slot + 0x0A, // GX FIFO + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, + + // ARM7 + + 0x30, // immediate + 0x26, // VBlank + 0x24, // DS cart slot + 0xFF, // wifi / GBA cart slot (TODO) +}; + bool DMAsInMode(u32 cpu, u32 mode) { cpu <<= 2; @@ -1378,6 +1401,13 @@ bool DMAsInMode(u32 cpu, u32 mode) if (DMAs[cpu+1]->IsInMode(mode)) return true; if (DMAs[cpu+2]->IsInMode(mode)) return true; if (DMAs[cpu+3]->IsInMode(mode)) return true; + + if (true) + { + cpu >>= 2; + return DSi::NDMAsInMode(cpu, NDMAModes[mode]); + } + return false; } @@ -1399,6 +1429,12 @@ void CheckDMAs(u32 cpu, u32 mode) DMAs[cpu+1]->StartIfNeeded(mode); DMAs[cpu+2]->StartIfNeeded(mode); DMAs[cpu+3]->StartIfNeeded(mode); + + if (true) + { + cpu >>= 2; + DSi::CheckNDMAs(cpu, NDMAModes[mode]); + } } void StopDMAs(u32 cpu, u32 mode) @@ -1408,6 +1444,12 @@ void StopDMAs(u32 cpu, u32 mode) DMAs[cpu+1]->StopIfNeeded(mode); DMAs[cpu+2]->StopIfNeeded(mode); DMAs[cpu+3]->StopIfNeeded(mode); + + if (true) + { + cpu >>= 2; + DSi::StopNDMAs(cpu, NDMAModes[mode]); + } } diff --git a/src/NDSCart.cpp b/src/NDSCart.cpp index 65cf8ae..b0e9837 100644 --- a/src/NDSCart.cpp +++ b/src/NDSCart.cpp @@ -1227,11 +1227,11 @@ void WriteROMCnt(u32 val) *(u32*)&cmd[4] = *(u32*)&ROMCommand[4]; } - printf("ROM COMMAND %04X %08X %02X%02X%02X%02X%02X%02X%02X%02X SIZE %04X\n", + /*printf("ROM COMMAND %04X %08X %02X%02X%02X%02X%02X%02X%02X%02X SIZE %04X\n", SPICnt, ROMCnt, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4], cmd[5], cmd[6], cmd[7], - datasize); + datasize);*/ switch (cmd[0]) { -- cgit v1.2.3 From 82302c9bf48598f889d0942340c224852c1378c5 Mon Sep 17 00:00:00 2001 From: Arisotura Date: Sat, 30 May 2020 03:15:05 +0200 Subject: fix shito. --- src/NDSCart.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/NDSCart.cpp') diff --git a/src/NDSCart.cpp b/src/NDSCart.cpp index 6a25bcb..06c3bde 100644 --- a/src/NDSCart.cpp +++ b/src/NDSCart.cpp @@ -875,10 +875,10 @@ void DecryptSecureArea(u8* out) memcpy(out, &CartROM[arm9base], 0x800); - Key1_InitKeycode(gamecode, 2, 2); + Key1_InitKeycode(false, gamecode, 2, 2); Key1_Decrypt((u32*)&out[0]); - Key1_InitKeycode(gamecode, 3, 2); + Key1_InitKeycode(false, gamecode, 3, 2); for (u32 i = 0; i < 0x800; i += 8) Key1_Decrypt((u32*)&out[i]); @@ -1018,7 +1018,7 @@ bool LoadROM(const char* path, const char* sram, bool direct) ROMCommandHandler = ROMCommand_Retail; // encryption - Key1_InitKeycode(gamecode, 2, 2); + Key1_InitKeycode(false, gamecode, 2, 2); // save printf("Save file: %s\n", sram); -- cgit v1.2.3 From 43e045357f7d74eecff61b0c8af8068b31e963b3 Mon Sep 17 00:00:00 2001 From: Arisotura Date: Mon, 1 Jun 2020 20:36:30 +0200 Subject: make it able to switch between DS and DSi modes --- src/ARM.cpp | 46 +++++++++ src/ARM.h | 43 ++++---- src/CP15.cpp | 30 ++---- src/DMA.cpp | 29 ++++-- src/DMA.h | 5 + src/DSi.cpp | 7 +- src/NDS.cpp | 54 +++++++--- src/NDS.h | 5 + src/NDSCart.cpp | 15 ++- src/SPI.cpp | 32 ++++-- src/SPU.cpp | 16 ++- src/SPU.h | 6 ++ src/frontend/FrontendUtil.h | 9 ++ src/frontend/Util_ROM.cpp | 163 +++++++++++++++++++++++++++--- src/frontend/qt_sdl/EmuSettingsDialog.cpp | 2 +- src/frontend/qt_sdl/main.cpp | 45 +++++++-- 16 files changed, 396 insertions(+), 111 deletions(-) (limited to 'src/NDSCart.cpp') diff --git a/src/ARM.cpp b/src/ARM.cpp index 2d8c807..68cac59 100644 --- a/src/ARM.cpp +++ b/src/ARM.cpp @@ -18,6 +18,7 @@ #include #include "NDS.h" +#include "DSi.h" #include "ARM.h" #include "ARMInterpreter.h" #include "AREngine.h" @@ -101,10 +102,55 @@ void ARM::Reset() void ARMv5::Reset() { + if (NDS::ConsoleType == 1) + { + BusRead8 = DSi::ARM9Read8; + BusRead16 = DSi::ARM9Read16; + BusRead32 = DSi::ARM9Read32; + BusWrite8 = DSi::ARM9Write8; + BusWrite16 = DSi::ARM9Write16; + BusWrite32 = DSi::ARM9Write32; + GetMemRegion = DSi::ARM9GetMemRegion; + } + else + { + BusRead8 = NDS::ARM9Read8; + BusRead16 = NDS::ARM9Read16; + BusRead32 = NDS::ARM9Read32; + BusWrite8 = NDS::ARM9Write8; + BusWrite16 = NDS::ARM9Write16; + BusWrite32 = NDS::ARM9Write32; + GetMemRegion = NDS::ARM9GetMemRegion; + } + CP15Reset(); ARM::Reset(); } +void ARMv4::Reset() +{ + if (NDS::ConsoleType) + { + BusRead8 = DSi::ARM7Read8; + BusRead16 = DSi::ARM7Read16; + BusRead32 = DSi::ARM7Read32; + BusWrite8 = DSi::ARM7Write8; + BusWrite16 = DSi::ARM7Write16; + BusWrite32 = DSi::ARM7Write32; + } + else + { + BusRead8 = NDS::ARM7Read8; + BusRead16 = NDS::ARM7Read16; + BusRead32 = NDS::ARM7Read32; + BusWrite8 = NDS::ARM7Write8; + BusWrite16 = NDS::ARM7Write16; + BusWrite32 = NDS::ARM7Write32; + } + + ARM::Reset(); +} + void ARM::DoSavestate(Savestate* file) { diff --git a/src/ARM.h b/src/ARM.h index 95c41d4..e0832e2 100644 --- a/src/ARM.h +++ b/src/ARM.h @@ -23,7 +23,6 @@ #include "types.h" #include "NDS.h" -#include "DSi.h" #define ROR(x, n) (((x) >> (n)) | ((x) << (32-(n)))) @@ -133,6 +132,14 @@ public: NDS::MemRegion CodeMem; static u32 ConditionTable[16]; + +protected: + u8 (*BusRead8)(u32 addr); + u16 (*BusRead16)(u32 addr); + u32 (*BusRead32)(u32 addr); + void (*BusWrite8)(u32 addr, u8 val); + void (*BusWrite16)(u32 addr, u16 val); + void (*BusWrite32)(u32 addr, u32 val); }; class ARMv5 : public ARM @@ -260,6 +267,8 @@ public: s32 RegionCodeCycles; u8* CurICacheLine; + + bool (*GetMemRegion)(u32 addr, bool write, NDS::MemRegion* region); }; class ARMv4 : public ARM @@ -267,26 +276,25 @@ class ARMv4 : public ARM public: ARMv4(); + void Reset(); + void JumpTo(u32 addr, bool restorecpsr = false); void Execute(); u16 CodeRead16(u32 addr) { - //return NDS::ARM7Read16(addr); - return DSi::ARM7Read16(addr); + return BusRead16(addr); } u32 CodeRead32(u32 addr) { - //return NDS::ARM7Read32(addr); - return DSi::ARM7Read32(addr); + return BusRead32(addr); } void DataRead8(u32 addr, u32* val) { - *val = DSi::ARM7Read8(addr); - //*val = NDS::ARM7Read8(addr); + *val = BusRead8(addr); DataRegion = addr >> 24; DataCycles = NDS::ARM7MemTimings[DataRegion][0]; } @@ -295,8 +303,7 @@ public: { addr &= ~1; - *val = DSi::ARM7Read16(addr); - //*val = NDS::ARM7Read16(addr); + *val = BusRead16(addr); DataRegion = addr >> 24; DataCycles = NDS::ARM7MemTimings[DataRegion][0]; } @@ -305,8 +312,7 @@ public: { addr &= ~3; - *val = DSi::ARM7Read32(addr); - //*val = NDS::ARM7Read32(addr); + *val = BusRead32(addr); DataRegion = addr >> 24; DataCycles = NDS::ARM7MemTimings[DataRegion][2]; } @@ -315,15 +321,13 @@ public: { addr &= ~3; - *val = DSi::ARM7Read32(addr); - //*val = NDS::ARM7Read32(addr); + *val = BusRead32(addr); DataCycles += NDS::ARM7MemTimings[DataRegion][3]; } void DataWrite8(u32 addr, u8 val) { - DSi::ARM7Write8(addr, val); - //NDS::ARM7Write8(addr, val); + BusWrite8(addr, val); DataRegion = addr >> 24; DataCycles = NDS::ARM7MemTimings[DataRegion][0]; } @@ -332,8 +336,7 @@ public: { addr &= ~1; - DSi::ARM7Write16(addr, val); - //NDS::ARM7Write16(addr, val); + BusWrite16(addr, val); DataRegion = addr >> 24; DataCycles = NDS::ARM7MemTimings[DataRegion][0]; } @@ -342,8 +345,7 @@ public: { addr &= ~3; - DSi::ARM7Write32(addr, val); - //NDS::ARM7Write32(addr, val); + BusWrite32(addr, val); DataRegion = addr >> 24; DataCycles = NDS::ARM7MemTimings[DataRegion][2]; } @@ -352,8 +354,7 @@ public: { addr &= ~3; - DSi::ARM7Write32(addr, val); - //NDS::ARM7Write32(addr, val); + BusWrite32(addr, val); DataCycles += NDS::ARM7MemTimings[DataRegion][3]; } diff --git a/src/CP15.cpp b/src/CP15.cpp index b61cc45..d340b9e 100644 --- a/src/CP15.cpp +++ b/src/CP15.cpp @@ -720,8 +720,7 @@ u32 ARMv5::CodeRead32(u32 addr, bool branch) if (CodeMem.Mem) return *(u32*)&CodeMem.Mem[addr & CodeMem.Mask]; - //return NDS::ARM9Read32(addr); - return DSi::ARM9Read32(addr); + return BusRead32(addr); } @@ -740,8 +739,7 @@ void ARMv5::DataRead8(u32 addr, u32* val) return; } - *val = DSi::ARM9Read8(addr); - //*val = NDS::ARM9Read8(addr); + *val = BusRead8(addr); DataCycles = MemTimings[addr >> 12][1]; } @@ -762,8 +760,7 @@ void ARMv5::DataRead16(u32 addr, u32* val) return; } - *val = DSi::ARM9Read16(addr); - //*val = NDS::ARM9Read16(addr); + *val = BusRead16(addr); DataCycles = MemTimings[addr >> 12][1]; } @@ -784,8 +781,7 @@ void ARMv5::DataRead32(u32 addr, u32* val) return; } - *val = DSi::ARM9Read32(addr); - //*val = NDS::ARM9Read32(addr); + *val = BusRead32(addr); DataCycles = MemTimings[addr >> 12][2]; } @@ -806,8 +802,7 @@ void ARMv5::DataRead32S(u32 addr, u32* val) return; } - *val = DSi::ARM9Read32(addr); - //*val = NDS::ARM9Read32(addr); + *val = BusRead32(addr); DataCycles += MemTimings[addr >> 12][3]; } @@ -826,8 +821,7 @@ void ARMv5::DataWrite8(u32 addr, u8 val) return; } - DSi::ARM9Write8(addr, val); - //NDS::ARM9Write8(addr, val); + BusWrite8(addr, val); DataCycles = MemTimings[addr >> 12][1]; } @@ -848,8 +842,7 @@ void ARMv5::DataWrite16(u32 addr, u16 val) return; } - DSi::ARM9Write16(addr, val); - //NDS::ARM9Write16(addr, val); + BusWrite16(addr, val); DataCycles = MemTimings[addr >> 12][1]; } @@ -870,8 +863,7 @@ void ARMv5::DataWrite32(u32 addr, u32 val) return; } - DSi::ARM9Write32(addr, val); - //NDS::ARM9Write32(addr, val); + BusWrite32(addr, val); DataCycles = MemTimings[addr >> 12][2]; } @@ -892,8 +884,7 @@ void ARMv5::DataWrite32S(u32 addr, u32 val) return; } - DSi::ARM9Write32(addr, val); - //NDS::ARM9Write32(addr, val); + BusWrite32(addr, val); DataCycles += MemTimings[addr >> 12][3]; } @@ -906,7 +897,6 @@ void ARMv5::GetCodeMemRegion(u32 addr, NDS::MemRegion* region) return; }*/ - DSi::ARM9GetMemRegion(addr, false, &CodeMem); - //NDS::ARM9GetMemRegion(addr, false, &CodeMem); + GetMemRegion(addr, false, &CodeMem); } diff --git a/src/DMA.cpp b/src/DMA.cpp index 8e294fc..cd2df45 100644 --- a/src/DMA.cpp +++ b/src/DMA.cpp @@ -53,8 +53,6 @@ DMA::DMA(u32 cpu, u32 num) CountMask = 0x001FFFFF; else CountMask = (num==3 ? 0x0000FFFF : 0x00003FFF); - - Reset(); } DMA::~DMA() @@ -77,6 +75,21 @@ void DMA::Reset() Running = false; InProgress = false; + + if (NDS::ConsoleType == 1) + { + BusRead16 = (CPU==0) ? DSi::ARM9Read16 : DSi::ARM7Read16; + BusRead32 = (CPU==0) ? DSi::ARM9Read32 : DSi::ARM7Read32; + BusWrite16 = (CPU==0) ? DSi::ARM9Write16 : DSi::ARM7Write16; + BusWrite32 = (CPU==0) ? DSi::ARM9Write32 : DSi::ARM7Write32; + } + else + { + BusRead16 = (CPU==0) ? NDS::ARM9Read16 : NDS::ARM7Read16; + BusRead32 = (CPU==0) ? NDS::ARM9Read32 : NDS::ARM7Read32; + BusWrite16 = (CPU==0) ? NDS::ARM9Write16 : NDS::ARM7Write16; + BusWrite32 = (CPU==0) ? NDS::ARM9Write32 : NDS::ARM7Write32; + } } void DMA::DoSavestate(Savestate* file) @@ -227,8 +240,7 @@ void DMA::Run9() { NDS::ARM9Timestamp += (unitcycles << NDS::ARM9ClockShift); - //NDS::ARM9Write16(CurDstAddr, NDS::ARM9Read16(CurSrcAddr)); - DSi::ARM9Write16(CurDstAddr, DSi::ARM9Read16(CurSrcAddr)); + BusWrite16(CurDstAddr, BusRead16(CurSrcAddr)); CurSrcAddr += SrcAddrInc<<1; CurDstAddr += DstAddrInc<<1; @@ -264,8 +276,7 @@ void DMA::Run9() { NDS::ARM9Timestamp += (unitcycles << NDS::ARM9ClockShift); - //NDS::ARM9Write32(CurDstAddr, NDS::ARM9Read32(CurSrcAddr)); - DSi::ARM9Write32(CurDstAddr, DSi::ARM9Read32(CurSrcAddr)); + BusWrite32(CurDstAddr, BusRead32(CurSrcAddr)); CurSrcAddr += SrcAddrInc<<2; CurDstAddr += DstAddrInc<<2; @@ -341,8 +352,7 @@ void DMA::Run7() { NDS::ARM7Timestamp += unitcycles; - //NDS::ARM7Write16(CurDstAddr, NDS::ARM7Read16(CurSrcAddr)); - DSi::ARM7Write16(CurDstAddr, DSi::ARM7Read16(CurSrcAddr)); + BusWrite16(CurDstAddr, BusRead16(CurSrcAddr)); CurSrcAddr += SrcAddrInc<<1; CurDstAddr += DstAddrInc<<1; @@ -378,8 +388,7 @@ void DMA::Run7() { NDS::ARM7Timestamp += unitcycles; - //NDS::ARM7Write32(CurDstAddr, NDS::ARM7Read32(CurSrcAddr)); - DSi::ARM7Write32(CurDstAddr, DSi::ARM7Read32(CurSrcAddr)); + BusWrite32(CurDstAddr, BusRead32(CurSrcAddr)); CurSrcAddr += SrcAddrInc<<2; CurDstAddr += DstAddrInc<<2; diff --git a/src/DMA.h b/src/DMA.h index 2e7678c..0344fba 100644 --- a/src/DMA.h +++ b/src/DMA.h @@ -86,6 +86,11 @@ private: bool Stall; bool IsGXFIFODMA; + + u16 (*BusRead16)(u32 addr); + u32 (*BusRead32)(u32 addr); + void (*BusWrite16)(u32 addr, u16 val); + void (*BusWrite32)(u32 addr, u32 val); }; #endif diff --git a/src/DSi.cpp b/src/DSi.cpp index 58f39c2..520b269 100644 --- a/src/DSi.cpp +++ b/src/DSi.cpp @@ -18,6 +18,7 @@ #include #include +#include "Config.h" #include "NDS.h" #include "DSi.h" #include "ARM.h" @@ -221,7 +222,7 @@ bool LoadBIOS() memset(ARM9iBIOS, 0, 0x10000); memset(ARM7iBIOS, 0, 0x10000); - f = Platform::OpenLocalFile("bios9i.bin", "rb"); + f = Platform::OpenLocalFile(Config::DSiBIOS9Path, "rb"); if (!f) { printf("ARM9i BIOS not found\n"); @@ -238,7 +239,7 @@ bool LoadBIOS() fclose(f); } - f = Platform::OpenLocalFile("bios7i.bin", "rb"); + f = Platform::OpenLocalFile(Config::DSiBIOS7Path, "rb"); if (!f) { printf("ARM7i BIOS not found\n"); @@ -283,7 +284,7 @@ bool LoadNAND() memset(NWRAMEnd, 0, sizeof(NWRAMEnd)); memset(NWRAMMask, 0, sizeof(NWRAMMask)); - FILE* f = Platform::OpenLocalFile("nand.bin", "rb"); + FILE* f = Platform::OpenLocalFile(Config::DSiNANDPath, "rb"); if (f) { u32 bootparams[8]; diff --git a/src/NDS.cpp b/src/NDS.cpp index 001dfe6..22368ae 100644 --- a/src/NDS.cpp +++ b/src/NDS.cpp @@ -62,6 +62,8 @@ namespace NDS // // timings for GBA slot and wifi are set up at runtime +int ConsoleType; + u8 ARM9MemTimings[0x40000][4]; u8 ARM7MemTimings[0x20000][4]; @@ -296,6 +298,8 @@ void InitTimings() // TODO: +3c nonseq waitstate doesn't apply to DMA! // but of course mainRAM always gets 8c nonseq waitstate + // TODO: DSi-specific timings!! + SetARM9RegionTimings(0x00000000, 0xFFFFFFFF, 32, 1 + 3, 1); // void SetARM9RegionTimings(0xFFFF0000, 0xFFFFFFFF, 32, 1 + 3, 1); // BIOS @@ -321,6 +325,12 @@ void InitTimings() void SetupDirectBoot() { + if (ConsoleType == 1) + { + printf("!! DIRECT BOOT NOT SUPPORTED IN DSI MODE\n"); + return; + } + u32 bootparams[8]; memcpy(bootparams, &NDSCart::CartROM[0x20], 8*4); @@ -469,7 +479,7 @@ void Reset() fclose(f); } - if (true) + if (ConsoleType == 1) { DSi::LoadBIOS(); DSi::LoadNAND(); @@ -559,8 +569,11 @@ void Reset() RTC::Reset(); Wifi::Reset(); - DSi::Reset(); - KeyInput &= ~(1 << (16+6)); // TODO + if (ConsoleType == 1) + { + DSi::Reset(); + KeyInput &= ~(1 << (16+6)); + } AREngine::Reset(); } @@ -670,6 +683,11 @@ bool DoSavestate(Savestate* file) { file->Section("NDSG"); + // TODO: + // * do something for bool's (sizeof=1) + // * do something for 'loading DSi-mode savestate in DS mode' and vice-versa + // * add IE2/IF2 there + file->VarArray(MainRAM, 0x400000); file->VarArray(SharedWRAM, 0x8000); file->VarArray(ARM7WRAM, 0x10000); @@ -772,6 +790,11 @@ bool DoSavestate(Savestate* file) return true; } +void SetConsoleType(int type) +{ + ConsoleType = type; +} + bool LoadROM(const char* path, const char* sram, bool direct) { if (NDSCart::LoadROM(path, sram, direct)) @@ -883,7 +906,7 @@ u32 RunFrame() if (!(CPUStop & 0x80000000)) DMAs[1]->Run(); if (!(CPUStop & 0x80000000)) DMAs[2]->Run(); if (!(CPUStop & 0x80000000)) DMAs[3]->Run(); - DSi::RunNDMAs(0); + if (ConsoleType == 1) DSi::RunNDMAs(0); } else { @@ -906,7 +929,7 @@ u32 RunFrame() DMAs[5]->Run(); DMAs[6]->Run(); DMAs[7]->Run(); - DSi::RunNDMAs(1); + if (ConsoleType == 1) DSi::RunNDMAs(1); } else { @@ -990,7 +1013,7 @@ void CancelEvent(u32 id) void TouchScreen(u16 x, u16 y) { - if (true) // TODO!! + if (ConsoleType == 1) { DSi_SPI_TSC::SetTouchCoords(x, y); } @@ -1003,7 +1026,7 @@ void TouchScreen(u16 x, u16 y) void ReleaseScreen() { - if (true) // TODO!! + if (ConsoleType == 1) { DSi_SPI_TSC::SetTouchCoords(0x000, 0xFFF); } @@ -1144,7 +1167,8 @@ void UpdateIRQ(u32 cpu) if (IME[cpu] & 0x1) { arm->IRQ = IE[cpu] & IF[cpu]; - if (cpu) arm->IRQ |= (IE2 & IF2); + if ((ConsoleType == 1) && cpu) + arm->IRQ |= (IE2 & IF2); } else { @@ -1223,7 +1247,7 @@ void GXFIFOStall() DMAs[1]->StallIfRunning(); DMAs[2]->StallIfRunning(); DMAs[3]->StallIfRunning(); - DSi::StallNDMAs(); + if (ConsoleType == 1) DSi::StallNDMAs(); } } @@ -1361,6 +1385,7 @@ void NocashPrint(u32 ncpu, u32 addr) void MonitorARM9Jump(u32 addr) { // checkme: can the entrypoint addr be THUMB? + // also TODO: make it work in DSi mode if ((!RunningGame) && NDSCart::CartROM) { @@ -1468,7 +1493,7 @@ bool DMAsInMode(u32 cpu, u32 mode) if (DMAs[cpu+2]->IsInMode(mode)) return true; if (DMAs[cpu+3]->IsInMode(mode)) return true; - if (true) + if (ConsoleType == 1) { cpu >>= 2; return DSi::NDMAsInMode(cpu, NDMAModes[mode]); @@ -1484,7 +1509,10 @@ bool DMAsRunning(u32 cpu) if (DMAs[cpu+1]->IsRunning()) return true; if (DMAs[cpu+2]->IsRunning()) return true; if (DMAs[cpu+3]->IsRunning()) return true; - if (DSi::NDMAsRunning(cpu>>2)) return true; + if (ConsoleType == 1) + { + if (DSi::NDMAsRunning(cpu>>2)) return true; + } return false; } @@ -1496,7 +1524,7 @@ void CheckDMAs(u32 cpu, u32 mode) DMAs[cpu+2]->StartIfNeeded(mode); DMAs[cpu+3]->StartIfNeeded(mode); - if (true) + if (ConsoleType == 1) { cpu >>= 2; DSi::CheckNDMAs(cpu, NDMAModes[mode]); @@ -1511,7 +1539,7 @@ void StopDMAs(u32 cpu, u32 mode) DMAs[cpu+2]->StopIfNeeded(mode); DMAs[cpu+3]->StopIfNeeded(mode); - if (true) + if (ConsoleType == 1) { cpu >>= 2; DSi::StopNDMAs(cpu, NDMAModes[mode]); diff --git a/src/NDS.h b/src/NDS.h index 26931de..9c5fe3d 100644 --- a/src/NDS.h +++ b/src/NDS.h @@ -133,6 +133,8 @@ typedef struct } MemRegion; +extern int ConsoleType; + extern u8 ARM9MemTimings[0x40000][4]; extern u8 ARM7MemTimings[0x20000][4]; @@ -174,6 +176,9 @@ bool DoSavestate(Savestate* file); void SetARM9RegionTimings(u32 addrstart, u32 addrend, int buswidth, int nonseq, int seq); void SetARM7RegionTimings(u32 addrstart, u32 addrend, int buswidth, int nonseq, int seq); +// 0=DS 1=DSi +void SetConsoleType(int type); + bool LoadROM(const char* path, const char* sram, bool direct); bool LoadGBAROM(const char* path, const char* sram); void LoadBIOS(); diff --git a/src/NDSCart.cpp b/src/NDSCart.cpp index 9497d33..b326dd6 100644 --- a/src/NDSCart.cpp +++ b/src/NDSCart.cpp @@ -561,11 +561,18 @@ void Key1_ApplyKeycode(u32* keycode, u32 mod) void Key1_InitKeycode(bool dsi, u32 idcode, u32 level, u32 mod) { - //memcpy(Key1_KeyBuf, &NDS::ARM7BIOS[0x30], 0x1048); // hax - if (dsi) - memcpy(Key1_KeyBuf, &DSi::ARM7Init[0x254], 0x1048); // hax + // TODO: source the key data from different possible places + if (NDS::ConsoleType == 1) + { + if (dsi) + memcpy(Key1_KeyBuf, &DSi::ARM7Init[0x254], 0x1048); // hax + else + memcpy(Key1_KeyBuf, &DSi::ITCMInit[0x4894], 0x1048); // hax + } else - memcpy(Key1_KeyBuf, &DSi::ITCMInit[0x4894], 0x1048); // hax + { + memcpy(Key1_KeyBuf, &NDS::ARM7BIOS[0x30], 0x1048); // hax + } u32 keycode[3] = {idcode, idcode>>1, idcode<<1}; if (level >= 1) Key1_ApplyKeycode(keycode, mod); diff --git a/src/SPI.cpp b/src/SPI.cpp index 29f3321..ac40707 100644 --- a/src/SPI.cpp +++ b/src/SPI.cpp @@ -93,7 +93,10 @@ void Reset() if (Firmware) delete[] Firmware; Firmware = NULL; - strncpy(FirmwarePath, Config::FirmwarePath, 1023); + if (NDS::ConsoleType == 1) + strncpy(FirmwarePath, Config::DSiFirmwarePath, 1023); + else + strncpy(FirmwarePath, Config::FirmwarePath, 1023); FILE* f = Platform::OpenLocalFile(FirmwarePath, "rb"); if (!f) @@ -620,7 +623,7 @@ void Reset() SPI_Firmware::Reset(); SPI_Powerman::Reset(); SPI_TSC::Reset(); - DSi_SPI_TSC::Reset(); + if (NDS::ConsoleType == 1) DSi_SPI_TSC::Reset(); } void DoSavestate(Savestate* file) @@ -633,7 +636,7 @@ void DoSavestate(Savestate* file) SPI_Firmware::DoSavestate(file); SPI_Powerman::DoSavestate(file); SPI_TSC::DoSavestate(file); - DSi_SPI_TSC::DoSavestate(file); + if (NDS::ConsoleType == 1) DSi_SPI_TSC::DoSavestate(file); } @@ -647,8 +650,12 @@ void WriteCnt(u16 val) { case 0x0000: SPI_Powerman::Hold = 0; break; case 0x0100: SPI_Firmware::Hold = 0; break; - //case 0x0200: SPI_TSC::DataPos = 0; break; - case 0x0200: DSi_SPI_TSC::DataPos = 0; break; + case 0x0200: + if (NDS::ConsoleType == 1) + DSi_SPI_TSC::DataPos = 0; + else + SPI_TSC::DataPos = 0; + break; } } @@ -674,8 +681,11 @@ u8 ReadData() { case 0x0000: return SPI_Powerman::Read(); case 0x0100: return SPI_Firmware::Read(); - //case 0x0200: return SPI_TSC::Read(); - case 0x0200: return DSi_SPI_TSC::Read(); + case 0x0200: + if (NDS::ConsoleType == 1) + return DSi_SPI_TSC::Read(); + else + return SPI_TSC::Read(); default: return 0; } } @@ -691,8 +701,12 @@ void WriteData(u8 val) { case 0x0000: SPI_Powerman::Write(val, Cnt&(1<<11)); break; case 0x0100: SPI_Firmware::Write(val, Cnt&(1<<11)); break; - //case 0x0200: SPI_TSC::Write(val, Cnt&(1<<11)); break; - case 0x0200: DSi_SPI_TSC::Write(val, Cnt&(1<<11)); break; + case 0x0200: + if (NDS::ConsoleType == 1) + DSi_SPI_TSC::Write(val, Cnt&(1<<11)); + else + SPI_TSC::Write(val, Cnt&(1<<11)); + break; default: printf("SPI to unknown device %04X %02X\n", Cnt, val); break; } diff --git a/src/SPU.cpp b/src/SPU.cpp index 959de12..9f6b107 100644 --- a/src/SPU.cpp +++ b/src/SPU.cpp @@ -155,6 +155,11 @@ Channel::~Channel() void Channel::Reset() { + if (NDS::ConsoleType == 1) + BusRead32 = DSi::ARM7Read32; + else + BusRead32 = NDS::ARM7Read32; + SetCnt(0); SrcAddr = 0; TimerReload = 0; @@ -217,8 +222,7 @@ void Channel::FIFO_BufferData() for (u32 i = 0; i < burstlen; i += 4) { - //FIFO[FIFOWritePos] = NDS::ARM7Read32(SrcAddr + FIFOReadOffset); - FIFO[FIFOWritePos] = DSi::ARM7Read32(SrcAddr + FIFOReadOffset); + FIFO[FIFOWritePos] = BusRead32(SrcAddr + FIFOReadOffset); FIFOReadOffset += 4; FIFOWritePos++; FIFOWritePos &= 0x7; @@ -466,6 +470,11 @@ CaptureUnit::~CaptureUnit() void CaptureUnit::Reset() { + if (NDS::ConsoleType == 1) + BusWrite32 = DSi::ARM7Write32; + else + BusWrite32 = NDS::ARM7Write32; + SetCnt(0); DstAddr = 0; TimerReload = 0; @@ -501,8 +510,7 @@ void CaptureUnit::FIFO_FlushData() { for (u32 i = 0; i < 4; i++) { - //NDS::ARM7Write32(DstAddr + FIFOWriteOffset, FIFO[FIFOReadPos]); - DSi::ARM7Write32(DstAddr + FIFOWriteOffset, FIFO[FIFOReadPos]); + BusWrite32(DstAddr + FIFOWriteOffset, FIFO[FIFOReadPos]); FIFOReadPos++; FIFOReadPos &= 0x3; diff --git a/src/SPU.h b/src/SPU.h index 74a4471..8ab17a0 100644 --- a/src/SPU.h +++ b/src/SPU.h @@ -142,6 +142,9 @@ public: } void PanOutput(s32* inbuf, u32 samples, s32* leftbuf, s32* rightbuf); + +private: + u32 (*BusRead32)(u32 addr); }; class CaptureUnit @@ -196,6 +199,9 @@ public: } void Run(s32 sample); + +private: + void (*BusWrite32)(u32 addr, u32 val); }; } diff --git a/src/frontend/FrontendUtil.h b/src/frontend/FrontendUtil.h index 6b83cbc..099583f 100644 --- a/src/frontend/FrontendUtil.h +++ b/src/frontend/FrontendUtil.h @@ -46,6 +46,15 @@ enum Load_FirmwareBad, Load_FirmwareNotBootable, + Load_DSiBIOS9Missing, + Load_DSiBIOS9Bad, + + Load_DSiBIOS7Missing, + Load_DSiBIOS7Bad, + + Load_DSiNANDMissing, + Load_DSiNANDBad, + // TODO: more precise errors for ROM loading Load_ROMLoadError, }; diff --git a/src/frontend/Util_ROM.cpp b/src/frontend/Util_ROM.cpp index d410550..8116a93 100644 --- a/src/frontend/Util_ROM.cpp +++ b/src/frontend/Util_ROM.cpp @@ -96,6 +96,42 @@ int VerifyDSBIOS() return Load_OK; } +int VerifyDSiBIOS() +{ + FILE* f; + long len; + + // TODO: check the first 32 bytes + + f = Platform::OpenLocalFile(Config::DSiBIOS9Path, "rb"); + if (!f) return Load_DSiBIOS9Missing; + + fseek(f, 0, SEEK_END); + len = ftell(f); + if (len != 0x10000) + { + fclose(f); + return Load_DSiBIOS9Bad; + } + + fclose(f); + + f = Platform::OpenLocalFile(Config::DSiBIOS7Path, "rb"); + if (!f) return Load_DSiBIOS7Missing; + + fseek(f, 0, SEEK_END); + len = ftell(f); + if (len != 0x10000) + { + fclose(f); + return Load_DSiBIOS7Bad; + } + + fclose(f); + + return Load_OK; +} + int VerifyDSFirmware() { FILE* f; @@ -110,7 +146,6 @@ int VerifyDSFirmware() { // 128KB firmware, not bootable fclose(f); - return Load_OK; // FIXME!!!! return Load_FirmwareNotBootable; } else if (len != 0x40000 && len != 0x80000) @@ -124,6 +159,45 @@ int VerifyDSFirmware() return Load_OK; } +int VerifyDSiFirmware() +{ + FILE* f; + long len; + + f = Platform::OpenLocalFile(Config::DSiFirmwarePath, "rb"); + if (!f) return Load_FirmwareMissing; + + fseek(f, 0, SEEK_END); + len = ftell(f); + if (len != 0x20000) + { + // not 128KB + // TODO: check whether those work + fclose(f); + return Load_FirmwareBad; + } + + fclose(f); + + return Load_OK; +} + +int VerifyDSiNAND() +{ + FILE* f; + long len; + + f = Platform::OpenLocalFile(Config::DSiNANDPath, "rb"); + if (!f) return Load_DSiNANDMissing; + + // TODO: some basic checks + // check that it has the nocash footer, and all + + fclose(f); + + return Load_OK; +} + int LoadBIOS() { int res; @@ -131,8 +205,22 @@ int LoadBIOS() res = VerifyDSBIOS(); if (res != Load_OK) return res; - res = VerifyDSFirmware(); - if (res != Load_OK) return res; + if (Config::ConsoleType == 1) + { + res = VerifyDSiBIOS(); + if (res != Load_OK) return res; + + res = VerifyDSiFirmware(); + if (res != Load_OK) return res; + + res = VerifyDSiNAND(); + if (res != Load_OK) return res; + } + else + { + res = VerifyDSFirmware(); + if (res != Load_OK) return res; + } // TODO: // original code in the libui frontend called NDS::LoadGBAROM() if needed @@ -142,6 +230,7 @@ int LoadBIOS() ROMPath[ROMSlot_NDS][0] = '\0'; SRAMPath[ROMSlot_NDS][0] = '\0'; + NDS::SetConsoleType(Config::ConsoleType); NDS::LoadBIOS(); SavestateLoaded = false; @@ -154,16 +243,39 @@ int LoadROM(const char* file, int slot) int res; bool directboot = Config::DirectBoot != 0; + if (Config::ConsoleType == 1 && slot == 1) + { + // cannot load a GBA ROM into a DSi + return Load_ROMLoadError; + } + res = VerifyDSBIOS(); if (res != Load_OK) return res; - res = VerifyDSFirmware(); - if (res != Load_OK) + if (Config::ConsoleType == 1) { - if (res == Load_FirmwareNotBootable) - directboot = true; - else - return res; + res = VerifyDSiBIOS(); + if (res != Load_OK) return res; + + res = VerifyDSiFirmware(); + if (res != Load_OK) return res; + + res = VerifyDSiNAND(); + if (res != Load_OK) return res; + + GBACart::Eject(); + ROMPath[ROMSlot_GBA][0] = '\0'; + } + else + { + res = VerifyDSFirmware(); + if (res != Load_OK) + { + if (res == Load_FirmwareNotBootable) + directboot = true; + else + return res; + } } char oldpath[1024]; @@ -177,6 +289,8 @@ int LoadROM(const char* file, int slot) SetupSRAMPath(0); SetupSRAMPath(1); + NDS::SetConsoleType(Config::ConsoleType); + if (slot == ROMSlot_NDS && NDS::LoadROM(ROMPath[slot], SRAMPath[slot], directboot)) { SavestateLoaded = false; @@ -225,17 +339,36 @@ int Reset() res = VerifyDSBIOS(); if (res != Load_OK) return res; - res = VerifyDSFirmware(); - if (res != Load_OK) + if (Config::ConsoleType == 1) { - if (res == Load_FirmwareNotBootable) - directboot = true; - else - return res; + res = VerifyDSiBIOS(); + if (res != Load_OK) return res; + + res = VerifyDSiFirmware(); + if (res != Load_OK) return res; + + res = VerifyDSiNAND(); + if (res != Load_OK) return res; + + GBACart::Eject(); + ROMPath[ROMSlot_GBA][0] = '\0'; + } + else + { + res = VerifyDSFirmware(); + if (res != Load_OK) + { + if (res == Load_FirmwareNotBootable) + directboot = true; + else + return res; + } } SavestateLoaded = false; + NDS::SetConsoleType(Config::ConsoleType); + if (ROMPath[ROMSlot_NDS][0] == '\0') { NDS::LoadBIOS(); diff --git a/src/frontend/qt_sdl/EmuSettingsDialog.cpp b/src/frontend/qt_sdl/EmuSettingsDialog.cpp index 7760a88..09faf4e 100644 --- a/src/frontend/qt_sdl/EmuSettingsDialog.cpp +++ b/src/frontend/qt_sdl/EmuSettingsDialog.cpp @@ -49,7 +49,7 @@ EmuSettingsDialog::EmuSettingsDialog(QWidget* parent) : QDialog(parent), ui(new ui->txtDSiNANDPath->setText(Config::DSiNANDPath); ui->cbxConsoleType->addItem("DS"); - ui->cbxConsoleType->addItem("DSi"); + ui->cbxConsoleType->addItem("DSi (experimental)"); ui->cbxConsoleType->setCurrentIndex(Config::ConsoleType); ui->chkDirectBoot->setChecked(Config::DirectBoot != 0); diff --git a/src/frontend/qt_sdl/main.cpp b/src/frontend/qt_sdl/main.cpp index ef21bc7..7b3d5cd 100644 --- a/src/frontend/qt_sdl/main.cpp +++ b/src/frontend/qt_sdl/main.cpp @@ -1360,17 +1360,40 @@ QString MainWindow::loadErrorStr(int error) { switch (error) { - case Frontend::Load_BIOS9Missing: return "DS ARM9 BIOS was not found or could not be accessed. Check your emu settings."; - case Frontend::Load_BIOS9Bad: return "DS ARM9 BIOS is not a valid BIOS dump."; - - case Frontend::Load_BIOS7Missing: return "DS ARM7 BIOS was not found or could not be accessed. Check your emu settings."; - case Frontend::Load_BIOS7Bad: return "DS ARM7 BIOS is not a valid BIOS dump."; - - case Frontend::Load_FirmwareMissing: return "DS firmware was not found or could not be accessed. Check your emu settings."; - case Frontend::Load_FirmwareBad: return "DS firmware is not a valid firmware dump."; - case Frontend::Load_FirmwareNotBootable: return "DS firmware is not bootable."; - - case Frontend::Load_ROMLoadError: return "Failed to load the ROM. Make sure the file is accessible and isn't used by another application."; + case Frontend::Load_BIOS9Missing: + return "DS ARM9 BIOS was not found or could not be accessed. Check your emu settings."; + case Frontend::Load_BIOS9Bad: + return "DS ARM9 BIOS is not a valid BIOS dump."; + + case Frontend::Load_BIOS7Missing: + return "DS ARM7 BIOS was not found or could not be accessed. Check your emu settings."; + case Frontend::Load_BIOS7Bad: + return "DS ARM7 BIOS is not a valid BIOS dump."; + + case Frontend::Load_FirmwareMissing: + return "DS firmware was not found or could not be accessed. Check your emu settings."; + case Frontend::Load_FirmwareBad: + return "DS firmware is not a valid firmware dump."; + case Frontend::Load_FirmwareNotBootable: + return "DS firmware is not bootable."; + + case Frontend::Load_DSiBIOS9Missing: + return "DSi ARM9 BIOS was not found or could not be accessed. Check your emu settings."; + case Frontend::Load_DSiBIOS9Bad: + return "DSi ARM9 BIOS is not a valid BIOS dump."; + + case Frontend::Load_DSiBIOS7Missing: + return "DSi ARM7 BIOS was not found or could not be accessed. Check your emu settings."; + case Frontend::Load_DSiBIOS7Bad: + return "DSi ARM7 BIOS is not a valid BIOS dump."; + + case Frontend::Load_DSiNANDMissing: + return "DSi NAND was not found or could not be accessed. Check your emu settings."; + case Frontend::Load_DSiNANDBad: + return "DSi NAND is not a valid NAND dump."; + + case Frontend::Load_ROMLoadError: + return "Failed to load the ROM. Make sure the file is accessible and isn't used by another application."; default: return "Unknown error during launch; smack Arisotura."; } -- cgit v1.2.3 From d0af89924edf4e14a092e5352808f6a2ce44d53a Mon Sep 17 00:00:00 2001 From: Arisotura Date: Tue, 2 Jun 2020 00:25:29 +0200 Subject: remove requirement for initmem7/9.bin (but this requires augmented BIOS dumps, we'll get there) --- src/DSi.cpp | 46 +++++++++++++++------------------------------- src/DSi.h | 3 --- src/NDSCart.cpp | 11 ++--------- 3 files changed, 17 insertions(+), 43 deletions(-) (limited to 'src/NDSCart.cpp') diff --git a/src/DSi.cpp b/src/DSi.cpp index 6a60f80..701387a 100644 --- a/src/DSi.cpp +++ b/src/DSi.cpp @@ -129,9 +129,6 @@ void Reset() memcpy(NDS::ARM9->ITCM, ITCMInit, 0x8000); - for (u32 i = 0; i < 0x3C00; i+=4) - ARM7Write32(0x03FFC400+i, *(u32*)&ARM7Init[i]); - DSi_I2C::Reset(); DSi_AES::Reset(); @@ -151,6 +148,9 @@ void Reset() NDS::MapSharedWRAM(3); + for (u32 i = 0; i < 0x3C00; i+=4) + ARM7Write32(0x03FFC400+i, *(u32*)&ARM7Init[i]); + u32 eaddr = 0x03FFE6E4; ARM7Write32(eaddr+0x00, *(u32*)&eMMC_CID[0]); ARM7Write32(eaddr+0x04, *(u32*)&eMMC_CID[4]); @@ -178,9 +178,6 @@ void SoftReset() memcpy(NDS::ARM9->ITCM, ITCMInit, 0x8000); - for (u32 i = 0; i < 0x3C00; i+=4) - ARM7Write32(0x03FFC400+i, *(u32*)&ARM7Init[i]); - DSi_AES::Reset(); LoadNAND(); @@ -204,6 +201,9 @@ void SoftReset() NDS::MapSharedWRAM(3); + for (u32 i = 0; i < 0x3C00; i+=4) + ARM7Write32(0x03FFC400+i, *(u32*)&ARM7Init[i]); + u32 eaddr = 0x03FFE6E4; ARM7Write32(eaddr+0x00, *(u32*)&eMMC_CID[0]); ARM7Write32(eaddr+0x04, *(u32*)&eMMC_CID[4]); @@ -433,32 +433,16 @@ bool LoadNAND() } memset(ITCMInit, 0, 0x8000); - memset(ARM7Init, 0, 0x3C00); - - f = fopen("initmem9.bin", "rb"); - if (f) - { - // first 0x2524 bytes are loaded to 0x01FFC400 - - u32 dstaddr = 0x01FFC400; - fread(&ITCMInit[dstaddr & 0x7FFF], /*0x2524*/0x3C00, 1, f); - fclose(f); - } - else - { - printf("DSi ARM9 meminit not found\n"); - } + memcpy(&ITCMInit[0x4400], &ARM9iBIOS[0x87F4], 0x400); + memcpy(&ITCMInit[0x4800], &ARM9iBIOS[0x9920], 0x80); + memcpy(&ITCMInit[0x4894], &ARM9iBIOS[0x99A0], 0x1048); + memcpy(&ITCMInit[0x58DC], &ARM9iBIOS[0xA9E8], 0x1048); - f = fopen("initmem7.bin", "rb"); - if (f) - { - fread(ARM7Init, 0x3C00, 1, f); - fclose(f); - } - else - { - printf("DSi ARM7 meminit not found\n"); - } + memset(ARM7Init, 0, 0x3C00); + memcpy(&ARM7Init[0x0000], &ARM7iBIOS[0x8188], 0x200); + memcpy(&ARM7Init[0x0200], &ARM7iBIOS[0xB5D8], 0x40); + memcpy(&ARM7Init[0x0254], &ARM7iBIOS[0xC6D0], 0x1048); + memcpy(&ARM7Init[0x129C], &ARM7iBIOS[0xD718], 0x1048); return true; } diff --git a/src/DSi.h b/src/DSi.h index 08712de..8cc8fd5 100644 --- a/src/DSi.h +++ b/src/DSi.h @@ -34,9 +34,6 @@ extern u64 ConsoleID; extern DSi_SDHost* SDMMC; extern DSi_SDHost* SDIO; -extern u8 ITCMInit[0x8000]; -extern u8 ARM7Init[0x3C00]; - bool Init(); void DeInit(); diff --git a/src/NDSCart.cpp b/src/NDSCart.cpp index b326dd6..a5e0f41 100644 --- a/src/NDSCart.cpp +++ b/src/NDSCart.cpp @@ -562,17 +562,10 @@ void Key1_ApplyKeycode(u32* keycode, u32 mod) void Key1_InitKeycode(bool dsi, u32 idcode, u32 level, u32 mod) { // TODO: source the key data from different possible places - if (NDS::ConsoleType == 1) - { - if (dsi) - memcpy(Key1_KeyBuf, &DSi::ARM7Init[0x254], 0x1048); // hax - else - memcpy(Key1_KeyBuf, &DSi::ITCMInit[0x4894], 0x1048); // hax - } + if (dsi && NDS::ConsoleType==1) + memcpy(Key1_KeyBuf, &DSi::ARM7iBIOS[0xC6D0], 0x1048); // hax else - { memcpy(Key1_KeyBuf, &NDS::ARM7BIOS[0x30], 0x1048); // hax - } u32 keycode[3] = {idcode, idcode>>1, idcode<<1}; if (level >= 1) Key1_ApplyKeycode(keycode, mod); -- cgit v1.2.3