From 9772201345ab47cc820fd6c08247c133605f8b84 Mon Sep 17 00:00:00 2001 From: RSDuck Date: Fri, 4 Sep 2020 20:37:14 +0200 Subject: remove some UB - savestates used to read a four bytes from a single byte value - a few unassigned variables - some other things - also make the ROR macro an inline function --- src/ARMJIT_A64/ARMJIT_ALU.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/ARMJIT_A64/ARMJIT_ALU.cpp') diff --git a/src/ARMJIT_A64/ARMJIT_ALU.cpp b/src/ARMJIT_A64/ARMJIT_ALU.cpp index 26a89cb..52a2258 100644 --- a/src/ARMJIT_A64/ARMJIT_ALU.cpp +++ b/src/ARMJIT_A64/ARMJIT_ALU.cpp @@ -436,7 +436,7 @@ void Compiler::A_Comp_GetOp2(bool S, Op2& op2) Comp_AddCycles_C(); u32 shift = (CurInstr.Instr >> 7) & 0x1E; - u32 imm = ROR(CurInstr.Instr & 0xFF, shift); + u32 imm = ::ROR(CurInstr.Instr & 0xFF, shift); if (S && shift && (CurInstr.SetFlags & 0x2)) { @@ -447,7 +447,7 @@ void Compiler::A_Comp_GetOp2(bool S, Op2& op2) ANDI2R(RCPSR, RCPSR, ~(1 << 29)); } - op2 = Op2(ROR(CurInstr.Instr & 0xFF, (CurInstr.Instr >> 7) & 0x1E)); + op2 = Op2(imm); } else { @@ -523,7 +523,7 @@ void Compiler::A_Comp_ALUMovOp() case ST_LSL: LSL(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break; case ST_LSR: LSR(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break; case ST_ASR: ASR(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break; - case ST_ROR: ROR_(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break; + case ST_ROR: ROR(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break; } } else -- cgit v1.2.3