From 4299ef5f067c0f7aac338fbdd5e36726f8c8af64 Mon Sep 17 00:00:00 2001 From: RSDuck Date: Fri, 14 Aug 2020 23:38:47 +0200 Subject: use unordered map for JIT RestoreCandidates also fix WifiRead32? --- src/ARMJIT.cpp | 153 ++++++++++++--------------------------------------------- 1 file changed, 32 insertions(+), 121 deletions(-) (limited to 'src/ARMJIT.cpp') diff --git a/src/ARMJIT.cpp b/src/ARMJIT.cpp index 0eb792c..59f7f54 100644 --- a/src/ARMJIT.cpp +++ b/src/ARMJIT.cpp @@ -38,6 +38,14 @@ namespace ARMJIT Compiler* JITCompiler; + +std::unordered_map JitBlocks9; +std::unordered_map JitBlocks7; + +std::unordered_map RestoreCandidates; + +TinyVector InvalidLiterals; + AddressRange CodeIndexITCM[ITCMPhysicalSize / 512]; AddressRange CodeIndexMainRAM[NDS::MainRAMMaxSize / 512]; AddressRange CodeIndexSWRAM[NDS::SharedWRAMSize / 512]; @@ -52,9 +60,6 @@ AddressRange CodeIndexNWRAM_A[DSi::NWRAMSize / 512]; AddressRange CodeIndexNWRAM_B[DSi::NWRAMSize / 512]; AddressRange CodeIndexNWRAM_C[DSi::NWRAMSize / 512]; -std::unordered_map JitBlocks9; -std::unordered_map JitBlocks7; - u64 FastBlockLookupITCM[ITCMPhysicalSize / 2]; u64 FastBlockLookupMainRAM[NDS::MainRAMMaxSize / 2]; u64 FastBlockLookupSWRAM[NDS::SharedWRAMSize / 2]; @@ -146,8 +151,6 @@ u32 LocaliseCodeAddress(u32 num, u32 addr) return 0; } -TinyVector InvalidLiterals; - template T SlowRead9(u32 addr, ARMv5* cpu) { @@ -286,97 +289,6 @@ void SlowBlockTransfer7(u32 addr, u64* data, u32 num) INSTANTIATE_SLOWMEM(0) INSTANTIATE_SLOWMEM(1) -template -struct UnreliableHashTable -{ - struct Bucket - { - K KeyA, KeyB; - V ValA, ValB; - }; - - Bucket Table[Size]; - - void Reset() - { - for (int i = 0; i < Size; i++) - { - Table[i].ValA = Table[i].ValB = InvalidValue; - } - } - - UnreliableHashTable() - { - Reset(); - } - - V Insert(K key, V value) - { - u32 slot = XXH3_64bits(&key, sizeof(K)) & (Size - 1); - Bucket* bucket = &Table[slot]; - - if (bucket->ValA == value || bucket->ValB == value) - { - return InvalidValue; - } - else if (bucket->ValA == InvalidValue) - { - bucket->KeyA = key; - bucket->ValA = value; - } - else if (bucket->ValB == InvalidValue) - { - bucket->KeyB = key; - bucket->ValB = value; - } - else - { - V prevVal = bucket->ValB; - bucket->KeyB = bucket->KeyA; - bucket->ValB = bucket->ValA; - bucket->KeyA = key; - bucket->ValA = value; - return prevVal; - } - - return InvalidValue; - } - - void Remove(K key) - { - u32 slot = XXH3_64bits(&key, sizeof(K)) & (Size - 1); - Bucket* bucket = &Table[slot]; - - if (bucket->KeyA == key && bucket->ValA != InvalidValue) - { - bucket->ValA = InvalidValue; - if (bucket->ValB != InvalidValue) - { - bucket->KeyA = bucket->KeyB; - bucket->ValA = bucket->ValB; - bucket->ValB = InvalidValue; - } - } - if (bucket->KeyB == key && bucket->ValB != InvalidValue) - bucket->ValB = InvalidValue; - } - - V LookUp(K addr) - { - u32 slot = XXH3_64bits(&addr, 4) & (Size - 1); - Bucket* bucket = &Table[slot]; - - if (bucket->ValA != InvalidValue && bucket->KeyA == addr) - return bucket->ValA; - if (bucket->ValB != InvalidValue && bucket->KeyB == addr) - return bucket->ValB; - - return InvalidValue; - } -}; - -UnreliableHashTable RestoreCandidates; - void Init() { JITCompiler = new Compiler(); @@ -622,6 +534,20 @@ InterpreterFunc InterpretTHUMB[ARMInstrInfo::tk_Count] = }; #undef F +void RetireJitBlock(JitBlock* block) +{ + auto it = RestoreCandidates.find(block->InstrHash); + if (it != RestoreCandidates.end()) + { + delete it->second; + it->second = block; + } + else + { + RestoreCandidates[block->InstrHash] = block; + } +} + void CompileBlock(ARM* cpu) { bool thumb = cpu->CPSR & 0x20; @@ -659,10 +585,7 @@ void CompileBlock(ARM* cpu) } // some memory has been remapped - JitBlock* prevBlock = RestoreCandidates.Insert(existingBlockIt->second->InstrHash, existingBlockIt->second); - if (prevBlock) - delete prevBlock; - + RetireJitBlock(existingBlockIt->second); map.erase(existingBlockIt); } @@ -906,11 +829,13 @@ void CompileBlock(ARM* cpu) u32 literalHash = (u32)XXH3_64bits(literalValues, numLiterals * 4); u32 instrHash = (u32)XXH3_64bits(instrValues, i * 4); - JitBlock* prevBlock = RestoreCandidates.LookUp(instrHash); + auto prevBlockIt = RestoreCandidates.find(instrHash); + JitBlock* prevBlock = NULL; bool mayRestore = true; - if (prevBlock) + if (prevBlockIt != RestoreCandidates.end()) { - RestoreCandidates.Remove(instrHash); + prevBlock = prevBlockIt->second; + RestoreCandidates.erase(prevBlockIt); mayRestore = prevBlock->StartAddr == blockAddr && prevBlock->LiteralHash == literalHash; @@ -932,7 +857,6 @@ void CompileBlock(ARM* cpu) else { mayRestore = false; - prevBlock = NULL; } JitBlock* block; @@ -1078,9 +1002,7 @@ void InvalidateByAddr(u32 localAddr) if (!literalInvalidation) { - JitBlock* prevBlock = RestoreCandidates.Insert(block->InstrHash, block); - if (prevBlock) - delete prevBlock; + RetireJitBlock(block); } else { @@ -1166,20 +1088,9 @@ void ResetBlockCache() InvalidLiterals.Clear(); for (int i = 0; i < ARMJIT_Memory::memregions_Count; i++) memset(FastBlockLookupRegions[i], 0xFF, CodeRegionSizes[i] * sizeof(u64) / 2); - RestoreCandidates.Reset(); - for (int i = 0; i < sizeof(RestoreCandidates.Table)/sizeof(RestoreCandidates.Table[0]); i++) - { - if (RestoreCandidates.Table[i].ValA) - { - delete RestoreCandidates.Table[i].ValA; - RestoreCandidates.Table[i].ValA = NULL; - } - if (RestoreCandidates.Table[i].ValA) - { - delete RestoreCandidates.Table[i].ValB; - RestoreCandidates.Table[i].ValB = NULL; - } - } + for (auto it = RestoreCandidates.begin(); it != RestoreCandidates.end(); it++) + delete it->second; + RestoreCandidates.clear(); for (auto it : JitBlocks9) { JitBlock* block = it.second; -- cgit v1.2.3 From 30fc6bbc09bfc1e57044b766813e57733777948a Mon Sep 17 00:00:00 2001 From: RSDuck Date: Sun, 23 Aug 2020 00:52:15 +0200 Subject: JIT: fix QDSUB/QSUB for interpreter run --- src/ARMJIT.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/ARMJIT.cpp') diff --git a/src/ARMJIT.cpp b/src/ARMJIT.cpp index 59f7f54..31983f6 100644 --- a/src/ARMJIT.cpp +++ b/src/ARMJIT.cpp @@ -480,7 +480,7 @@ InterpreterFunc InterpretARM[ARMInstrInfo::ak_Count] = F_ALU(CMN,), F(MUL), F(MLA), F(UMULL), F(UMLAL), F(SMULL), F(SMLAL), F(SMLAxy), F(SMLAWy), F(SMULWy), F(SMLALxy), F(SMULxy), - F(CLZ), F(QADD), F(QDADD), F(QSUB), F(QDSUB), + F(CLZ), F(QADD), F(QSUB), F(QDADD), F(QDSUB), F_MEM_WB(STR), F_MEM_WB(STRB), -- cgit v1.2.3 From 9772201345ab47cc820fd6c08247c133605f8b84 Mon Sep 17 00:00:00 2001 From: RSDuck Date: Fri, 4 Sep 2020 20:37:14 +0200 Subject: remove some UB - savestates used to read a four bytes from a single byte value - a few unassigned variables - some other things - also make the ROR macro an inline function --- src/ARM.h | 5 ++++- src/ARMJIT.cpp | 5 ++++- src/ARMJIT_A64/ARMJIT_ALU.cpp | 6 +++--- src/ARMJIT_A64/ARMJIT_Compiler.cpp | 2 +- src/ARMJIT_A64/ARMJIT_LoadStore.cpp | 6 +++--- src/ARMJIT_x64/ARMJIT_ALU.cpp | 6 +++--- src/ARMJIT_x64/ARMJIT_Compiler.cpp | 2 +- src/ARMJIT_x64/ARMJIT_LoadStore.cpp | 8 ++++---- src/DMA.cpp | 6 ++++-- src/GPU2D.cpp | 1 + src/GPU3D.cpp | 14 +++++++------- src/NDS.cpp | 2 +- src/Savestate.cpp | 18 +++++++++++++++++- src/Savestate.h | 2 ++ src/Wifi.cpp | 2 +- src/dolphin/Arm64Emitter.cpp | 2 +- src/dolphin/Arm64Emitter.h | 2 +- src/dolphin/x64Emitter.cpp | 2 +- src/dolphin/x64Emitter.h | 2 +- 19 files changed, 60 insertions(+), 33 deletions(-) (limited to 'src/ARMJIT.cpp') diff --git a/src/ARM.h b/src/ARM.h index deacbee..52c971a 100644 --- a/src/ARM.h +++ b/src/ARM.h @@ -24,7 +24,10 @@ #include "types.h" #include "NDS.h" -#define ROR(x, n) (((x) >> (n)) | ((x) << (32-(n)))) +inline u32 ROR(u32 x, u32 n) +{ + return (x >> (n&0x1F)) | (x << ((32-n)&0x1F)); +} enum { diff --git a/src/ARMJIT.cpp b/src/ARMJIT.cpp index 31983f6..c9d2b62 100644 --- a/src/ARMJIT.cpp +++ b/src/ARMJIT.cpp @@ -1087,7 +1087,10 @@ void ResetBlockCache() InvalidLiterals.Clear(); for (int i = 0; i < ARMJIT_Memory::memregions_Count; i++) - memset(FastBlockLookupRegions[i], 0xFF, CodeRegionSizes[i] * sizeof(u64) / 2); + { + if (FastBlockLookupRegions[i]) + memset(FastBlockLookupRegions[i], 0xFF, CodeRegionSizes[i] * sizeof(u64) / 2); + } for (auto it = RestoreCandidates.begin(); it != RestoreCandidates.end(); it++) delete it->second; RestoreCandidates.clear(); diff --git a/src/ARMJIT_A64/ARMJIT_ALU.cpp b/src/ARMJIT_A64/ARMJIT_ALU.cpp index 26a89cb..52a2258 100644 --- a/src/ARMJIT_A64/ARMJIT_ALU.cpp +++ b/src/ARMJIT_A64/ARMJIT_ALU.cpp @@ -436,7 +436,7 @@ void Compiler::A_Comp_GetOp2(bool S, Op2& op2) Comp_AddCycles_C(); u32 shift = (CurInstr.Instr >> 7) & 0x1E; - u32 imm = ROR(CurInstr.Instr & 0xFF, shift); + u32 imm = ::ROR(CurInstr.Instr & 0xFF, shift); if (S && shift && (CurInstr.SetFlags & 0x2)) { @@ -447,7 +447,7 @@ void Compiler::A_Comp_GetOp2(bool S, Op2& op2) ANDI2R(RCPSR, RCPSR, ~(1 << 29)); } - op2 = Op2(ROR(CurInstr.Instr & 0xFF, (CurInstr.Instr >> 7) & 0x1E)); + op2 = Op2(imm); } else { @@ -523,7 +523,7 @@ void Compiler::A_Comp_ALUMovOp() case ST_LSL: LSL(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break; case ST_LSR: LSR(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break; case ST_ASR: ASR(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break; - case ST_ROR: ROR_(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break; + case ST_ROR: ROR(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break; } } else diff --git a/src/ARMJIT_A64/ARMJIT_Compiler.cpp b/src/ARMJIT_A64/ARMJIT_Compiler.cpp index b046123..80c7f04 100644 --- a/src/ARMJIT_A64/ARMJIT_Compiler.cpp +++ b/src/ARMJIT_A64/ARMJIT_Compiler.cpp @@ -76,7 +76,7 @@ void Compiler::A_Comp_MSR() if (CurInstr.Instr & (1 << 25)) { val = W0; - MOVI2R(val, ROR((CurInstr.Instr & 0xFF), ((CurInstr.Instr >> 7) & 0x1E))); + MOVI2R(val, ::ROR((CurInstr.Instr & 0xFF), ((CurInstr.Instr >> 7) & 0x1E))); } else { diff --git a/src/ARMJIT_A64/ARMJIT_LoadStore.cpp b/src/ARMJIT_A64/ARMJIT_LoadStore.cpp index 6140ffc..14aa847 100644 --- a/src/ARMJIT_A64/ARMJIT_LoadStore.cpp +++ b/src/ARMJIT_A64/ARMJIT_LoadStore.cpp @@ -65,7 +65,7 @@ bool Compiler::Comp_MemLoadLiteral(int size, bool signExtend, int rd, u32 addr) if (size == 32) { CurCPU->DataRead32(addr & ~0x3, &val); - val = ROR(val, (addr & 0x3) << 3); + val = ::ROR(val, (addr & 0x3) << 3); } else if (size == 16) { @@ -151,7 +151,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags) { if (offset.Reg.ShiftType == ST_ROR) { - ROR_(W0, offset.Reg.Rm, offset.Reg.ShiftAmount); + ROR(W0, offset.Reg.Rm, offset.Reg.ShiftAmount); offset = Op2(W0); } @@ -220,7 +220,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags) if (size == 32) { if (staticAddress & 0x3) - ROR_(rdMapped, W0, (staticAddress & 0x3) << 3); + ROR(rdMapped, W0, (staticAddress & 0x3) << 3); else MOV(rdMapped, W0); } diff --git a/src/ARMJIT_x64/ARMJIT_ALU.cpp b/src/ARMJIT_x64/ARMJIT_ALU.cpp index 57a38c4..24d22ed 100644 --- a/src/ARMJIT_x64/ARMJIT_ALU.cpp +++ b/src/ARMJIT_x64/ARMJIT_ALU.cpp @@ -110,7 +110,7 @@ OpArg Compiler::A_Comp_GetALUOp2(bool S, bool& carryUsed) Comp_AddCycles_C(); u32 shift = (CurInstr.Instr >> 7) & 0x1E; - u32 imm = ROR(CurInstr.Instr & 0xFF, shift); + u32 imm = ::ROR(CurInstr.Instr & 0xFF, shift); carryUsed = false; if (S && shift) @@ -493,7 +493,7 @@ OpArg Compiler::Comp_RegShiftReg(int op, Gen::OpArg rs, Gen::OpArg rm, bool S, b { if (S) BT(32, R(RSCRATCH), Imm8(31)); - ROR_(32, R(RSCRATCH), R(ECX)); + ROR(32, R(RSCRATCH), R(ECX)); if (S) SETcc(CC_C, R(RSCRATCH2)); } @@ -555,7 +555,7 @@ OpArg Compiler::Comp_RegShiftImm(int op, int amount, OpArg rm, bool S, bool& car case 3: // ROR MOV(32, R(RSCRATCH), rm); if (amount > 0) - ROR_(32, R(RSCRATCH), Imm8(amount)); + ROR(32, R(RSCRATCH), Imm8(amount)); else { BT(32, R(RCPSR), Imm8(29)); diff --git a/src/ARMJIT_x64/ARMJIT_Compiler.cpp b/src/ARMJIT_x64/ARMJIT_Compiler.cpp index 1fdbaf8..c6419c9 100644 --- a/src/ARMJIT_x64/ARMJIT_Compiler.cpp +++ b/src/ARMJIT_x64/ARMJIT_Compiler.cpp @@ -106,7 +106,7 @@ void Compiler::A_Comp_MSR() Comp_AddCycles_C(); OpArg val = CurInstr.Instr & (1 << 25) - ? Imm32(ROR((CurInstr.Instr & 0xFF), ((CurInstr.Instr >> 7) & 0x1E))) + ? Imm32(::ROR((CurInstr.Instr & 0xFF), ((CurInstr.Instr >> 7) & 0x1E))) : MapReg(CurInstr.A_Reg(0)); u32 mask = 0; diff --git a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp index 57d98cc..1be6608 100644 --- a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp +++ b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp @@ -73,7 +73,7 @@ bool Compiler::Comp_MemLoadLiteral(int size, bool signExtend, int rd, u32 addr) if (size == 32) { CurCPU->DataRead32(addr & ~0x3, &val); - val = ROR(val, (addr & 0x3) << 3); + val = ::ROR(val, (addr & 0x3) << 3); } else if (size == 16) { @@ -225,13 +225,13 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag if (addrIsStatic) { if (staticAddress & 0x3) - ROR_(32, rdMapped, Imm8((staticAddress & 0x3) * 8)); + ROR(32, rdMapped, Imm8((staticAddress & 0x3) * 8)); } else { AND(32, R(RSCRATCH3), Imm8(0x3)); SHL(32, R(RSCRATCH3), Imm8(3)); - ROR_(32, rdMapped, R(RSCRATCH3)); + ROR(32, rdMapped, R(RSCRATCH3)); } } } @@ -270,7 +270,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag { MOV(32, rdMapped, R(RSCRATCH)); if (staticAddress & 0x3) - ROR_(32, rdMapped, Imm8((staticAddress & 0x3) * 8)); + ROR(32, rdMapped, Imm8((staticAddress & 0x3) * 8)); } else { diff --git a/src/DMA.cpp b/src/DMA.cpp index cd2df45..18b8a2f 100644 --- a/src/DMA.cpp +++ b/src/DMA.cpp @@ -73,6 +73,8 @@ void DMA::Reset() SrcAddrInc = 0; DstAddrInc = 0; + Stall = false; + Running = false; InProgress = false; @@ -111,8 +113,8 @@ void DMA::DoSavestate(Savestate* file) file->Var32(&DstAddrInc); file->Var32(&Running); - file->Var32((u32*)&InProgress); - file->Var32((u32*)&IsGXFIFODMA); + file->Bool32(&InProgress); + file->Bool32(&IsGXFIFODMA); } void DMA::WriteCnt(u32 val) diff --git a/src/GPU2D.cpp b/src/GPU2D.cpp index 2c3086c..07790b7 100644 --- a/src/GPU2D.cpp +++ b/src/GPU2D.cpp @@ -102,6 +102,7 @@ GPU2D::~GPU2D() void GPU2D::Reset() { + Enabled = false; DispCnt = 0; memset(BGCnt, 0, 4*2); memset(BGXPos, 0, 4*2); diff --git a/src/GPU3D.cpp b/src/GPU3D.cpp index d9d6ba8..5ccacf4 100644 --- a/src/GPU3D.cpp +++ b/src/GPU3D.cpp @@ -470,7 +470,7 @@ void DoSavestate(Savestate* file) file->VarArray(vtx->Color, sizeof(s32)*3); file->VarArray(vtx->TexCoords, sizeof(s16)*2); - file->Var32((u32*)&vtx->Clipped); + file->Bool32(&vtx->Clipped); file->VarArray(vtx->FinalPosition, sizeof(s32)*2); file->VarArray(vtx->FinalColor, sizeof(s32)*3); @@ -507,7 +507,7 @@ void DoSavestate(Savestate* file) file->VarArray(vtx->Color, sizeof(s32)*3); file->VarArray(vtx->TexCoords, sizeof(s16)*2); - file->Var32((u32*)&vtx->Clipped); + file->Bool32(&vtx->Clipped); file->VarArray(vtx->FinalPosition, sizeof(s32)*2); file->VarArray(vtx->FinalColor, sizeof(s32)*3); @@ -545,17 +545,17 @@ void DoSavestate(Savestate* file) file->VarArray(poly->FinalZ, sizeof(s32)*10); file->VarArray(poly->FinalW, sizeof(s32)*10); - file->Var32((u32*)&poly->WBuffer); + file->Bool32(&poly->WBuffer); file->Var32(&poly->Attr); file->Var32(&poly->TexParam); file->Var32(&poly->TexPalette); - file->Var32((u32*)&poly->FacingView); - file->Var32((u32*)&poly->Translucent); + file->Bool32(&poly->FacingView); + file->Bool32(&poly->Translucent); - file->Var32((u32*)&poly->IsShadowMask); - file->Var32((u32*)&poly->IsShadow); + file->Bool32(&poly->IsShadowMask); + file->Bool32(&poly->IsShadow); if (file->IsAtleastVersion(4, 1)) file->Var32((u32*)&poly->Type); diff --git a/src/NDS.cpp b/src/NDS.cpp index f926399..20f149a 100644 --- a/src/NDS.cpp +++ b/src/NDS.cpp @@ -775,7 +775,7 @@ bool DoSavestate(Savestate* file) file->Var8(&WRAMCnt); - file->Var32((u32*)&RunningGame); + file->Bool32(&RunningGame); if (!file->Saving) { diff --git a/src/Savestate.cpp b/src/Savestate.cpp index 0337ff2..ba8ffd9 100644 --- a/src/Savestate.cpp +++ b/src/Savestate.cpp @@ -261,6 +261,22 @@ void Savestate::Var64(u64* var) } } +void Savestate::Bool32(bool* var) +{ + // for compability + if (Saving) + { + u32 val = *var; + Var32(&val); + } + else + { + u32 val; + Var32(&val); + *var = val != 0; + } +} + void Savestate::VarArray(void* data, u32 len) { if (Error) return; @@ -273,4 +289,4 @@ void Savestate::VarArray(void* data, u32 len) { fread(data, len, 1, file); } -} +} \ No newline at end of file diff --git a/src/Savestate.h b/src/Savestate.h index a5447b3..c3c2e1d 100644 --- a/src/Savestate.h +++ b/src/Savestate.h @@ -46,6 +46,8 @@ public: void Var32(u32* var); void Var64(u64* var); + void Bool32(bool* var); + void VarArray(void* data, u32 len); bool IsAtleastVersion(u32 major, u32 minor) diff --git a/src/Wifi.cpp b/src/Wifi.cpp index 8a06041..2957007 100644 --- a/src/Wifi.cpp +++ b/src/Wifi.cpp @@ -237,7 +237,7 @@ void DoSavestate(Savestate* file) file->Var64(&USCounter); file->Var64(&USCompare); - file->Var32((u32*)&BlockBeaconIRQ14); + file->Bool32(&BlockBeaconIRQ14); file->Var32(&ComStatus); file->Var32(&TXCurSlot); diff --git a/src/dolphin/Arm64Emitter.cpp b/src/dolphin/Arm64Emitter.cpp index 97c93ba..289b20c 100644 --- a/src/dolphin/Arm64Emitter.cpp +++ b/src/dolphin/Arm64Emitter.cpp @@ -1631,7 +1631,7 @@ void ARM64XEmitter::ASR(ARM64Reg Rd, ARM64Reg Rm, int shift) int bits = Is64Bit(Rd) ? 64 : 32; SBFM(Rd, Rm, shift, bits - 1); } -void ARM64XEmitter::ROR_(ARM64Reg Rd, ARM64Reg Rm, int shift) +void ARM64XEmitter::ROR(ARM64Reg Rd, ARM64Reg Rm, int shift) { EXTR(Rd, Rm, Rm, shift); } diff --git a/src/dolphin/Arm64Emitter.h b/src/dolphin/Arm64Emitter.h index 4c49502..3da3912 100644 --- a/src/dolphin/Arm64Emitter.h +++ b/src/dolphin/Arm64Emitter.h @@ -727,7 +727,7 @@ public: void LSR(ARM64Reg Rd, ARM64Reg Rm, int shift); void LSL(ARM64Reg Rd, ARM64Reg Rm, int shift); void ASR(ARM64Reg Rd, ARM64Reg Rm, int shift); - void ROR_(ARM64Reg Rd, ARM64Reg Rm, int shift); + void ROR(ARM64Reg Rd, ARM64Reg Rm, int shift); // Logical (immediate) void AND(ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms, bool invert = false); diff --git a/src/dolphin/x64Emitter.cpp b/src/dolphin/x64Emitter.cpp index 343f314..fd90ba7 100644 --- a/src/dolphin/x64Emitter.cpp +++ b/src/dolphin/x64Emitter.cpp @@ -1214,7 +1214,7 @@ void XEmitter::ROL(int bits, const OpArg& dest, const OpArg& shift) { WriteShift(bits, dest, shift, 0); } -void XEmitter::ROR_(int bits, const OpArg& dest, const OpArg& shift) +void XEmitter::ROR(int bits, const OpArg& dest, const OpArg& shift) { WriteShift(bits, dest, shift, 1); } diff --git a/src/dolphin/x64Emitter.h b/src/dolphin/x64Emitter.h index 869acb6..8799600 100644 --- a/src/dolphin/x64Emitter.h +++ b/src/dolphin/x64Emitter.h @@ -489,7 +489,7 @@ public: // Shift void ROL(int bits, const OpArg& dest, const OpArg& shift); - void ROR_(int bits, const OpArg& dest, const OpArg& shift); + void ROR(int bits, const OpArg& dest, const OpArg& shift); void RCL(int bits, const OpArg& dest, const OpArg& shift); void RCR(int bits, const OpArg& dest, const OpArg& shift); void SHL(int bits, const OpArg& dest, const OpArg& shift); -- cgit v1.2.3