From 844ca4505570bef9c6c8b16263a2473f7df9020a Mon Sep 17 00:00:00 2001 From: StapleButter Date: Sat, 3 Dec 2016 02:09:04 +0100 Subject: add MSR/MRS. also fix misc error with LDR ROR effect. see shibboleet, I can do it too :> --- ARMInterpreter_LoadStore.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ARMInterpreter_LoadStore.cpp') diff --git a/ARMInterpreter_LoadStore.cpp b/ARMInterpreter_LoadStore.cpp index e319056..b719e35 100644 --- a/ARMInterpreter_LoadStore.cpp +++ b/ARMInterpreter_LoadStore.cpp @@ -67,7 +67,7 @@ namespace ARMInterpreter #define A_LDR \ offset += cpu->R[(cpu->CurInstr>>16) & 0xF]; \ - u32 val = ROR(cpu->Read32(offset), offset&0x3); \ + u32 val = ROR(cpu->Read32(offset), ((offset&0x3)<<3)); \ if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset; \ if (((cpu->CurInstr>>12) & 0xF) == 15) \ { \ @@ -83,7 +83,7 @@ namespace ARMInterpreter #define A_LDR_POST \ u32 addr = cpu->R[(cpu->CurInstr>>16) & 0xF]; \ - u32 val = ROR(cpu->Read32(addr, cpu->CurInstr & (1<<21)), addr&0x3); \ + u32 val = ROR(cpu->Read32(addr, cpu->CurInstr & (1<<21)), ((addr&0x3)<<3)); \ cpu->R[(cpu->CurInstr>>16) & 0xF] += offset; \ if (((cpu->CurInstr>>12) & 0xF) == 15) \ { \ -- cgit v1.2.3