From cb79a5dc14ad2c259636101cc99ae6fe082ef609 Mon Sep 17 00:00:00 2001
From: Dario Nieuwenhuis <dirbaio@dirbaio.net>
Date: Thu, 24 May 2018 00:58:36 +0200
Subject: Make Main RAM size configurable in a single place.
---
src/NDS.cpp | 28 ++++++++++++++--------------
src/NDS.h | 4 +++-
2 files changed, 17 insertions(+), 15 deletions(-)
diff --git a/src/NDS.cpp b/src/NDS.cpp
index fa7cb84..bdb0c2d 100644
--- a/src/NDS.cpp
+++ b/src/NDS.cpp
@@ -57,7 +57,7 @@ u32 CPUStop;
u8 ARM9BIOS[0x1000];
u8 ARM7BIOS[0x4000];
-u8 MainRAM[0x400000];
+u8 MainRAM[MAIN_RAM_SIZE];
u8 SharedWRAM[0x8000];
u8 WRAMCnt;
@@ -281,7 +281,7 @@ void Reset()
fclose(f);
}
- memset(MainRAM, 0, 0x400000);
+ memset(MainRAM, 0, MAIN_RAM_SIZE);
memset(SharedWRAM, 0, 0x8000);
memset(ARM7WRAM, 0, 0x10000);
@@ -918,7 +918,7 @@ u8 ARM9Read8(u32 addr)
switch (addr & 0xFF000000)
{
case 0x02000000:
- return *(u8*)&MainRAM[addr & 0x3FFFFF];
+ return *(u8*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)];
case 0x03000000:
if (SWRAM_ARM9) return *(u8*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
@@ -967,7 +967,7 @@ u16 ARM9Read16(u32 addr)
switch (addr & 0xFF000000)
{
case 0x02000000:
- return *(u16*)&MainRAM[addr & 0x3FFFFF];
+ return *(u16*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)];
case 0x03000000:
if (SWRAM_ARM9) return *(u16*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
@@ -1016,7 +1016,7 @@ u32 ARM9Read32(u32 addr)
switch (addr & 0xFF000000)
{
case 0x02000000:
- return *(u32*)&MainRAM[addr & 0x3FFFFF];
+ return *(u32*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)];
case 0x03000000:
if (SWRAM_ARM9) return *(u32*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
@@ -1060,7 +1060,7 @@ void ARM9Write8(u32 addr, u8 val)
switch (addr & 0xFF000000)
{
case 0x02000000:
- *(u8*)&MainRAM[addr & 0x3FFFFF] = val;
+ *(u8*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
return;
case 0x03000000:
@@ -1085,7 +1085,7 @@ void ARM9Write16(u32 addr, u16 val)
switch (addr & 0xFF000000)
{
case 0x02000000:
- *(u16*)&MainRAM[addr & 0x3FFFFF] = val;
+ *(u16*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
return;
case 0x03000000:
@@ -1124,7 +1124,7 @@ void ARM9Write32(u32 addr, u32 val)
switch (addr & 0xFF000000)
{
case 0x02000000:
- *(u32*)&MainRAM[addr & 0x3FFFFF] = val;
+ *(u32*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
return;
case 0x03000000:
@@ -1176,7 +1176,7 @@ u8 ARM7Read8(u32 addr)
{
case 0x02000000:
case 0x02800000:
- return *(u8*)&MainRAM[addr & 0x3FFFFF];
+ return *(u8*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)];
case 0x03000000:
if (SWRAM_ARM7) return *(u8*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
@@ -1213,7 +1213,7 @@ u16 ARM7Read16(u32 addr)
{
case 0x02000000:
case 0x02800000:
- return *(u16*)&MainRAM[addr & 0x3FFFFF];
+ return *(u16*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)];
case 0x03000000:
if (SWRAM_ARM7) return *(u16*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
@@ -1253,7 +1253,7 @@ u32 ARM7Read32(u32 addr)
{
case 0x02000000:
case 0x02800000:
- return *(u32*)&MainRAM[addr & 0x3FFFFF];
+ return *(u32*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)];
case 0x03000000:
if (SWRAM_ARM7) return *(u32*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
@@ -1283,7 +1283,7 @@ void ARM7Write8(u32 addr, u8 val)
{
case 0x02000000:
case 0x02800000:
- *(u8*)&MainRAM[addr & 0x3FFFFF] = val;
+ *(u8*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
return;
case 0x03000000:
@@ -1314,7 +1314,7 @@ void ARM7Write16(u32 addr, u16 val)
{
case 0x02000000:
case 0x02800000:
- *(u16*)&MainRAM[addr & 0x3FFFFF] = val;
+ *(u16*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
return;
case 0x03000000:
@@ -1349,7 +1349,7 @@ void ARM7Write32(u32 addr, u32 val)
{
case 0x02000000:
case 0x02800000:
- *(u32*)&MainRAM[addr & 0x3FFFFF] = val;
+ *(u32*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
return;
case 0x03000000:
diff --git a/src/NDS.h b/src/NDS.h
index 71f6d41..137c774 100644
--- a/src/NDS.h
+++ b/src/NDS.h
@@ -101,7 +101,9 @@ extern u8 ROMSeed1[2*8];
extern u8 ARM9BIOS[0x1000];
extern u8 ARM7BIOS[0x4000];
-extern u8 MainRAM[0x400000];
+#define MAIN_RAM_SIZE 0x400000
+
+extern u8 MainRAM[MAIN_RAM_SIZE];
bool Init();
void DeInit();
--
cgit v1.2.3
From d721e098ebcbe6343d22cb10e25a46c1ff790a21 Mon Sep 17 00:00:00 2001
From: Dario Nieuwenhuis <dirbaio@dirbaio.net>
Date: Thu, 24 May 2018 01:00:33 +0200
Subject: Make "unknown IO" messages consistent, all including value and PC.
---
src/NDS.cpp | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/src/NDS.cpp b/src/NDS.cpp
index bdb0c2d..df9ed33 100644
--- a/src/NDS.cpp
+++ b/src/NDS.cpp
@@ -1456,7 +1456,7 @@ u8 ARM9IORead8(u32 addr)
return GPU3D::Read8(addr);
}
- printf("unknown ARM9 IO read8 %08X\n", addr);
+ printf("unknown ARM9 IO read8 %08X %08X\n", addr, ARM9->R[15]);
return 0;
}
@@ -1694,7 +1694,7 @@ u32 ARM9IORead32(u32 addr)
return GPU3D::Read32(addr);
}
- printf("unknown ARM9 IO read32 %08X\n", addr);
+ printf("unknown ARM9 IO read32 %08X %08X\n", addr, ARM9->R[15]);
return 0;
}
@@ -1774,7 +1774,7 @@ void ARM9IOWrite8(u32 addr, u8 val)
return;
}
- printf("unknown ARM9 IO write8 %08X %02X\n", addr, val);
+ printf("unknown ARM9 IO write8 %08X %02X %08X\n", addr, val, ARM9->R[15]);
}
void ARM9IOWrite16(u32 addr, u16 val)
@@ -1935,7 +1935,7 @@ void ARM9IOWrite16(u32 addr, u16 val)
return;
}
- printf("unknown ARM9 IO write16 %08X %04X %08X\n", addr, val, ARM9->R[14]);
+ printf("unknown ARM9 IO write16 %08X %04X %08X\n", addr, val, ARM9->R[15]);
}
void ARM9IOWrite32(u32 addr, u32 val)
@@ -2088,7 +2088,7 @@ void ARM9IOWrite32(u32 addr, u32 val)
return;
}
- printf("unknown ARM9 IO write32 %08X %08X\n", addr, val);
+ printf("unknown ARM9 IO write32 %08X %08X %08X\n", addr, val, ARM9->R[15]);
}
@@ -2133,7 +2133,7 @@ u8 ARM7IORead8(u32 addr)
return SPU::Read8(addr);
}
- printf("unknown ARM7 IO read8 %08X\n", addr);
+ printf("unknown ARM7 IO read8 %08X %08X\n", addr, ARM7->R[15]);
return 0;
}
@@ -2210,7 +2210,7 @@ u16 ARM7IORead16(u32 addr)
return SPU::Read16(addr);
}
- printf("unknown ARM7 IO read16 %08X %08X\n", addr, ARM9->R[15]);
+ printf("unknown ARM7 IO read16 %08X %08X\n", addr, ARM7->R[15]);
return 0;
}
@@ -2296,7 +2296,7 @@ u32 ARM7IORead32(u32 addr)
return SPU::Read32(addr);
}
- printf("unknown ARM7 IO read32 %08X\n", addr);
+ printf("unknown ARM7 IO read32 %08X %08X\n", addr, ARM7->R[15]);
return 0;
}
@@ -2368,7 +2368,7 @@ void ARM7IOWrite8(u32 addr, u8 val)
return;
}
- printf("unknown ARM7 IO write8 %08X %02X\n", addr, val);
+ printf("unknown ARM7 IO write8 %08X %02X %08X\n", addr, val, ARM7->R[15]);
}
void ARM7IOWrite16(u32 addr, u16 val)
@@ -2489,7 +2489,7 @@ void ARM7IOWrite16(u32 addr, u16 val)
return;
}
- printf("unknown ARM7 IO write16 %08X %04X\n", addr, val);
+ printf("unknown ARM7 IO write16 %08X %04X %08X\n", addr, val, ARM7->R[15]);
}
void ARM7IOWrite32(u32 addr, u32 val)
@@ -2591,7 +2591,7 @@ void ARM7IOWrite32(u32 addr, u32 val)
return;
}
- printf("unknown ARM7 IO write32 %08X %08X\n", addr, val);
+ printf("unknown ARM7 IO write32 %08X %08X %08X\n", addr, val, ARM7->R[15]);
}
}
--
cgit v1.2.3
From 700e262979f95b9035ed99f531eeb4e13a2ea581 Mon Sep 17 00:00:00 2001
From: Dario Nieuwenhuis <dirbaio@dirbaio.net>
Date: Thu, 24 May 2018 01:15:15 +0200
Subject: Fix build on Arch Linux.
---
CMakeLists.txt | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 9d7a0e7..e0779f6 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -83,13 +83,14 @@ if (UNIX)
FIND_PACKAGE(PkgConfig REQUIRED)
PKG_CHECK_MODULES(GTK3 REQUIRED gtk+-3.0)
+ PKG_CHECK_MODULES(SDL2 REQUIRED sdl2)
- INCLUDE_DIRECTORIES(${GTK3_INCLUDE_DIRS})
- LINK_LIBRARIES(${GTK3_LIBRARIES})
+ INCLUDE_DIRECTORIES(${GTK3_INCLUDE_DIRS} ${SDL2_INCLUDE_DIRS})
+ LINK_LIBRARIES(${GTK3_LIBRARIES} ${SDL2_LIBRARIES})
ADD_DEFINITIONS(${GTK3_CFLAGS_OTHER})
-
- add_custom_command(OUTPUT melon_grc.c
+
+ add_custom_command(OUTPUT melon_grc.c
COMMAND glib-compile-resources --sourcedir="${CMAKE_CURRENT_SOURCE_DIR}"
--target="${CMAKE_CURRENT_BINARY_DIR}/melon_grc.c"
--generate-source "${CMAKE_CURRENT_SOURCE_DIR}/melon_grc.xml"
--
cgit v1.2.3