aboutsummaryrefslogtreecommitdiff
path: root/src/ARM_InstrInfo.h
Commit message (Collapse)AuthorAge
* Move all core types into namespaces (#1886)Jesse Talavera-Greenberg2023-11-25
| | | | | | | | * Reorganize namespaces - Most types are now moved into the `melonDS` namespace - Only good chance to do this for a while, since a big refactor is next * Fix the build
* Refactor the JIT to be object-oriented (#1879)Jesse Talavera-Greenberg2023-11-18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Move TinyVector to a new file - So it's less sensitive to #include ordering * Forgot to include assert.h * Refactor ARMJIT_Memory into an object * Oops, forgot a declaration * Refactor ARMJIT to be contained in an object * Remove an unused function declaration * Add a missing #include * Remove a now-unused global * Use ARMJIT_Memory's own memory access functions * Fix some omissions in the ARM JIT * Move libandroid to be a member of ARMJIT_Memory instead of a global * Default-initialize most fields in ARMJIT_Compiler.h * Define NOOP_IF_NO_JIT * Finish refactoring the JIT to be object-oriented
* update copyright yearsArisotura2023-11-04
|
* fix copyright headersArisotura2022-03-07
|
* update copyright headersArisotura2022-01-09
|
* update copyright year and add missing GPL headersRSDuck2021-03-12
|
* first steps in bringing over the JIT refactor/fastmemRSDuck2020-06-16
|
* improve nop handling and proper behaviour for LDM^RSDuck2020-04-26
| | | | fixes dslinux
* integrate changes from ARM64 backend and moreRSDuck2020-04-26
| | | | | | | | | - better handle LDM/STM in reg alloc - unify Halted and IRQ in anticipation for branch inlining - literal optimisations can be disabled in gui - jit blocks follow simple returns - fix idle loop detection - break jit blocks on IRQ (fixes saving in Pokemon White)
* decrease jit block cache address granularityRSDuck2020-04-26
| | | | | | | fixes Dragon Quest IX move code with side effects out of assert, fixes release build (thanks to m4wx for this one) also remove some leftovers of jit pipelining
* new block cache and much more...RSDuck2020-04-26
| | | | | | | | | - more reliable code invalidation detection - blocks aren't stopped at any branch, but are being followed if possible to get larger blocks - idle loop recognition - optimised literal loads, load/store cycle counting and loads/stores from constant addresses
* load register only if neededRSDuck2020-04-26
| | | | | - do thumb bl long merge in the first step - preparations for better branch jitting
* optimise away unneeded flag setsRSDuck2020-04-26
| | | | | - especially useful for thumb code and larger max block sizes - can still be improved upon
* jit: fix thumb hi reg alu and mcr haltRSDuck2020-04-26
| | | | + mcr/mrc aren't always, msr_imm is never unk on ARM7
* jit: branch instructionsRSDuck2020-04-26
|
* JIT: compilation of word load and storeRSDuck2020-04-26
|
* JIT: baseRSDuck2020-04-26
all instructions are interpreted