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path: root/src/ARM_InstrInfo.h
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* first steps in bringing over the JIT refactor/fastmemRSDuck2020-06-16
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* improve nop handling and proper behaviour for LDM^RSDuck2020-04-26
| | | | fixes dslinux
* integrate changes from ARM64 backend and moreRSDuck2020-04-26
| | | | | | | | | - better handle LDM/STM in reg alloc - unify Halted and IRQ in anticipation for branch inlining - literal optimisations can be disabled in gui - jit blocks follow simple returns - fix idle loop detection - break jit blocks on IRQ (fixes saving in Pokemon White)
* decrease jit block cache address granularityRSDuck2020-04-26
| | | | | | | fixes Dragon Quest IX move code with side effects out of assert, fixes release build (thanks to m4wx for this one) also remove some leftovers of jit pipelining
* new block cache and much more...RSDuck2020-04-26
| | | | | | | | | - more reliable code invalidation detection - blocks aren't stopped at any branch, but are being followed if possible to get larger blocks - idle loop recognition - optimised literal loads, load/store cycle counting and loads/stores from constant addresses
* load register only if neededRSDuck2020-04-26
| | | | | - do thumb bl long merge in the first step - preparations for better branch jitting
* optimise away unneeded flag setsRSDuck2020-04-26
| | | | | - especially useful for thumb code and larger max block sizes - can still be improved upon
* jit: fix thumb hi reg alu and mcr haltRSDuck2020-04-26
| | | | + mcr/mrc aren't always, msr_imm is never unk on ARM7
* jit: branch instructionsRSDuck2020-04-26
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* JIT: compilation of word load and storeRSDuck2020-04-26
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* JIT: baseRSDuck2020-04-26
all instructions are interpreted