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path: root/src/ARM_InstrInfo.cpp
Commit message (Collapse)AuthorAge
* implement carry setting ALU op with immRSDuck2020-07-25
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* first steps in bringing over the JIT refactor/fastmemRSDuck2020-06-16
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* rewrite JIT memory emulationRSDuck2020-05-09
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* implement msr and mrs for the x64 JITRSDuck2020-04-26
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* move ARM64 JIT backend hereRSDuck2020-04-26
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* improve nop handling and proper behaviour for LDM^RSDuck2020-04-26
| | | | fixes dslinux
* integrate changes from ARM64 backend and moreRSDuck2020-04-26
| | | | | | | | | - better handle LDM/STM in reg alloc - unify Halted and IRQ in anticipation for branch inlining - literal optimisations can be disabled in gui - jit blocks follow simple returns - fix idle loop detection - break jit blocks on IRQ (fixes saving in Pokemon White)
* decrease jit block cache address granularityRSDuck2020-04-26
| | | | | | | fixes Dragon Quest IX move code with side effects out of assert, fixes release build (thanks to m4wx for this one) also remove some leftovers of jit pipelining
* new block cache and much more...RSDuck2020-04-26
| | | | | | | | | - more reliable code invalidation detection - blocks aren't stopped at any branch, but are being followed if possible to get larger blocks - idle loop recognition - optimised literal loads, load/store cycle counting and loads/stores from constant addresses
* more fixes for flag optimisationRSDuck2020-04-26
| | | | + small cycle counting optimisation
* fixes for flag optimisationRSDuck2020-04-26
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* optimise away unneeded flag setsRSDuck2020-04-26
| | | | | - especially useful for thumb code and larger max block sizes - can still be improved upon
* fix register alloc for half word loadsRSDuck2020-04-26
| | | | | fixes Mega Man Star Force 2 with cheat applied it probably used a pc relative load which were interpreted as branches
* jit: fix thumb hi reg alu and mcr haltRSDuck2020-04-26
| | | | + mcr/mrc aren't always, msr_imm is never unk on ARM7
* jit: fix misc static branch thingsRSDuck2020-04-26
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* jit: fix BLX_reg with rn=lrRSDuck2020-04-26
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* jit: branch instructionsRSDuck2020-04-26
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* jit: thumb block transfer workingRSDuck2020-04-26
| | | | also pc and sp relative loads and some refactoring
* JIT: most mem instructions workingRSDuck2020-04-26
| | | | + branching
* JIT: baseRSDuck2020-04-26
all instructions are interpreted