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modified version of melonDS used for school/vsr
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ARM_InstrInfo.cpp
Commit message (
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Author
Age
*
implement carry setting ALU op with imm
RSDuck
2020-07-25
*
first steps in bringing over the JIT refactor/fastmem
RSDuck
2020-06-16
*
rewrite JIT memory emulation
RSDuck
2020-05-09
*
implement msr and mrs for the x64 JIT
RSDuck
2020-04-26
*
move ARM64 JIT backend here
RSDuck
2020-04-26
*
improve nop handling and proper behaviour for LDM^
RSDuck
2020-04-26
*
integrate changes from ARM64 backend and more
RSDuck
2020-04-26
*
decrease jit block cache address granularity
RSDuck
2020-04-26
*
new block cache and much more...
RSDuck
2020-04-26
*
more fixes for flag optimisation
RSDuck
2020-04-26
*
fixes for flag optimisation
RSDuck
2020-04-26
*
optimise away unneeded flag sets
RSDuck
2020-04-26
*
fix register alloc for half word loads
RSDuck
2020-04-26
*
jit: fix thumb hi reg alu and mcr halt
RSDuck
2020-04-26
*
jit: fix misc static branch things
RSDuck
2020-04-26
*
jit: fix BLX_reg with rn=lr
RSDuck
2020-04-26
*
jit: branch instructions
RSDuck
2020-04-26
*
jit: thumb block transfer working
RSDuck
2020-04-26
*
JIT: most mem instructions working
RSDuck
2020-04-26
*
JIT: base
RSDuck
2020-04-26