| Commit message (Collapse) | Author | Age | |
|---|---|---|---|
| * | fix copyright headers | Arisotura | 2022-03-07 |
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| * | update copyright headers | Arisotura | 2022-01-09 |
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| * | support allocating more registers for aarch64 JIT | RSDuck | 2021-06-29 |
| | | | | | also some minor fixes for the x64 JIT as well | ||
| * | update copyright year and add missing GPL headers | RSDuck | 2021-03-12 |
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| * | fix JIT block hash after a merged thumb BL | RSDuck | 2021-01-05 |
| | | | | | fixes #928 | ||
| * | Fix a couple of wrong cpp function pointers. (#785) | Filippo Scognamiglio | 2020-10-31 |
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| * | subtract cycles after checking IRQ and Halt | RSDuck | 2020-07-27 |
| | | | | | also switch back to adding to ARM::Cycles instead of subtracting from them | ||
| * | fix inlined IO register access | RSDuck | 2020-06-16 |
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| * | allow allocating caller saved registers | RSDuck | 2020-05-09 |
| | | | | | currently system-v only | ||
| * | implement block linking + some refactoring | RSDuck | 2020-04-26 |
| | | | | | currently only supported for x64 | ||
| * | improve nop handling and proper behaviour for LDM^ | RSDuck | 2020-04-26 |
| | | | | | fixes dslinux | ||
| * | new block cache and much more... | RSDuck | 2020-04-26 |
| | | | | | | | | | | - more reliable code invalidation detection - blocks aren't stopped at any branch, but are being followed if possible to get larger blocks - idle loop recognition - optimised literal loads, load/store cycle counting and loads/stores from constant addresses | ||
| * | load register only if needed | RSDuck | 2020-04-26 |
| | | | | | | - do thumb bl long merge in the first step - preparations for better branch jitting | ||
| * | more fixes for flag optimisation | RSDuck | 2020-04-26 |
| | | | | | + small cycle counting optimisation | ||
| * | abandon pipelining on jit | RSDuck | 2020-04-26 |
| | | | | | | fixes Golden Sun Dawn this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state. | ||
| * | jit: fix thumb hi reg alu and mcr halt | RSDuck | 2020-04-26 |
| | | | | | + mcr/mrc aren't always, msr_imm is never unk on ARM7 | ||
| * | jit: fix misc static branch things | RSDuck | 2020-04-26 |
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| * | jit: fix BLX_reg with rn=lr | RSDuck | 2020-04-26 |
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| * | jit: fix linux | RSDuck | 2020-04-26 |
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| * | jit: LDM/STM finally(!) working + MUL, MLA and CLZ | RSDuck | 2020-04-26 |
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| * | jit: branch instructions | RSDuck | 2020-04-26 |