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path: root/src/ARMJIT_x64/ARMJIT_Branch.cpp
Commit message (Collapse)AuthorAge
* fix inlined IO register accessRSDuck2020-06-16
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* allow allocating caller saved registersRSDuck2020-05-09
| | | | currently system-v only
* implement block linking + some refactoringRSDuck2020-04-26
| | | | currently only supported for x64
* improve nop handling and proper behaviour for LDM^RSDuck2020-04-26
| | | | fixes dslinux
* new block cache and much more...RSDuck2020-04-26
| | | | | | | | | - more reliable code invalidation detection - blocks aren't stopped at any branch, but are being followed if possible to get larger blocks - idle loop recognition - optimised literal loads, load/store cycle counting and loads/stores from constant addresses
* load register only if neededRSDuck2020-04-26
| | | | | - do thumb bl long merge in the first step - preparations for better branch jitting
* more fixes for flag optimisationRSDuck2020-04-26
| | | | + small cycle counting optimisation
* abandon pipelining on jitRSDuck2020-04-26
| | | | | fixes Golden Sun Dawn this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state.
* jit: fix thumb hi reg alu and mcr haltRSDuck2020-04-26
| | | | + mcr/mrc aren't always, msr_imm is never unk on ARM7
* jit: fix misc static branch thingsRSDuck2020-04-26
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* jit: fix BLX_reg with rn=lrRSDuck2020-04-26
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* jit: fix linuxRSDuck2020-04-26
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* jit: LDM/STM finally(!) working + MUL, MLA and CLZRSDuck2020-04-26
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* jit: branch instructionsRSDuck2020-04-26