| Commit message (Collapse) | Author | Age | |
|---|---|---|---|
| * | jit: fix RSC | RSDuck | 2020-04-26 |
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| * | jit: fix thumb hi reg alu and mcr halt | RSDuck | 2020-04-26 |
| | | | | | + mcr/mrc aren't always, msr_imm is never unk on ARM7 | ||
| * | jit: fix linux | RSDuck | 2020-04-26 |
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| * | jit: SMULL and SMLAL | RSDuck | 2020-04-26 |
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| * | jit: LDM/STM finally(!) working + MUL, MLA and CLZ | RSDuck | 2020-04-26 |
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| * | JIT: most mem instructions working | RSDuck | 2020-04-26 |
| | | | | | + branching | ||
| * | JIT: compilation of word load and store | RSDuck | 2020-04-26 |
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| * | jit: correct cycle counting for thumb shift by reg | RSDuck | 2020-04-26 |
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| * | JIT: implemented most ALU instructions | RSDuck | 2020-04-26 |