| Commit message (Collapse) | Author | Age | |
|---|---|---|---|
| * | implement carry setting ALU op with imm | RSDuck | 2020-07-25 |
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| * | compile UMULLs and some fixes | RSDuck | 2020-04-26 |
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| * | new block cache and much more... | RSDuck | 2020-04-26 |
| | | | | | | | | | | - more reliable code invalidation detection - blocks aren't stopped at any branch, but are being followed if possible to get larger blocks - idle loop recognition - optimised literal loads, load/store cycle counting and loads/stores from constant addresses | ||
| * | fixes for flag optimisation | RSDuck | 2020-04-26 |
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| * | optimise away unneeded flag sets | RSDuck | 2020-04-26 |
| | | | | | | - especially useful for thumb code and larger max block sizes - can still be improved upon | ||
| * | remove unneeded dolphin code, C++11 static_assert | RSDuck | 2020-04-26 |
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| * | jit: fix RSC | RSDuck | 2020-04-26 |
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| * | jit: fix thumb hi reg alu and mcr halt | RSDuck | 2020-04-26 |
| | | | | | + mcr/mrc aren't always, msr_imm is never unk on ARM7 | ||
| * | jit: fix linux | RSDuck | 2020-04-26 |
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| * | jit: SMULL and SMLAL | RSDuck | 2020-04-26 |
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| * | jit: LDM/STM finally(!) working + MUL, MLA and CLZ | RSDuck | 2020-04-26 |
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| * | JIT: most mem instructions working | RSDuck | 2020-04-26 |
| | | | | | + branching | ||
| * | JIT: compilation of word load and store | RSDuck | 2020-04-26 |
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| * | jit: correct cycle counting for thumb shift by reg | RSDuck | 2020-04-26 |
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| * | JIT: implemented most ALU instructions | RSDuck | 2020-04-26 |