Commit message (Collapse) | Author | Age | |
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* | invalidate JIT blocks in ARM7 WVRAM when it's remapped | RSDuck | 2022-08-22 |
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* | fix copyright headers | Arisotura | 2022-03-07 |
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* | update copyright headers | Arisotura | 2022-01-09 |
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* | decouple JIT from Config. bahahahahah | Arisotura | 2021-11-17 |
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* | ARM64 macOS JIT - fix warnings + some cleanup | WaluigiWare64 | 2021-07-23 |
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* | update copyright year and add missing GPL headers | RSDuck | 2021-03-12 |
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* | reconcile DSi and JIT, fastmem for x64 and Windows | RSDuck | 2020-06-30 |
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* | first steps in bringing over the JIT refactor/fastmem | RSDuck | 2020-06-16 |
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* | rewrite JIT memory emulation | RSDuck | 2020-05-09 |
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* | implement block linking + some refactoring | RSDuck | 2020-04-26 |
| | | | | currently only supported for x64 | ||
* | make literal optimisation more reliable | RSDuck | 2020-04-26 |
| | | | | fixes spanish Pokemon HeartGold | ||
* | new block cache and much more... | RSDuck | 2020-04-26 |
| | | | | | | | | | - more reliable code invalidation detection - blocks aren't stopped at any branch, but are being followed if possible to get larger blocks - idle loop recognition - optimised literal loads, load/store cycle counting and loads/stores from constant addresses | ||
* | load register only if needed | RSDuck | 2020-04-26 |
| | | | | | - do thumb bl long merge in the first step - preparations for better branch jitting | ||
* | optimise away unneeded flag sets | RSDuck | 2020-04-26 |
| | | | | | - especially useful for thumb code and larger max block sizes - can still be improved upon | ||
* | jit: decrease blockcache AddrMapping size for ARM9 | RSDuck | 2020-04-26 |
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* | jit: make everything configurable | RSDuck | 2020-04-26 |
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* | jit: branch instructions | RSDuck | 2020-04-26 |
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* | JIT: most mem instructions working | RSDuck | 2020-04-26 |
| | | | | + branching | ||
* | JIT: compilation of word load and store | RSDuck | 2020-04-26 |
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* | JIT: implemented most ALU instructions | RSDuck | 2020-04-26 |
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* | JIT: base | RSDuck | 2020-04-26 |
all instructions are interpreted |