| Commit message (Collapse) | Author | Age | |
|---|---|---|---|
| * | MCR/MRC aren't available in user mode | Arisotura | 2021-10-28 |
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| * | fix some gaps in CPU modes | Arisotura | 2021-10-28 |
| | | | | | | | | * non-defined CPU modes are actually possible * bit4 of all PSRs is forced to one (modes 00-0F aren't possible) * modes 14/15/16 and 18/19/1A share a SPSR with modes 17 and 1B respectively (but they don't share the register banks) * modes 10 and 1C/1D/1E don't have a SPSR (MRS returns the CPSR always) | ||
| * | update copyright year and add missing GPL headers | RSDuck | 2021-03-12 |
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| * | update copyright years | Arisotura | 2020-02-14 |
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| * | also, update copyright name | Arisotura | 2019-01-22 |
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| * | make this other branch where we're going to actually make it usable | StapleButter | 2018-12-08 |
| | | | | | but it'll be a gross hack | ||
| * | begin PU work | StapleButter | 2018-12-04 |
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| * | begin work on general timing renovation. way shitty because it behaves as if ↵ | StapleButter | 2018-12-04 |
| | | | | | caches were off, so everything will be slow as shit. | ||
| * | fixor copyright years. | StapleButter | 2018-09-15 |
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| * | fix some shit | StapleButter | 2017-06-13 |
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| * | * send undefined instructions to the proper exception handler | StapleButter | 2017-06-13 |
| | | | | | * make ARM9-only instructions fail on ARM7 | ||
| * | reorganize repo, move shit around | StapleButter | 2017-03-16 |