| Commit message (Collapse) | Author | Age | |
|---|---|---|---|
| * | get rid of DTCMSize | RSDuck | 2021-10-29 |
| | | |||
| * | more accurate DTCM check | Arisotura | 2021-10-28 |
| | | |||
| * | blarg | Arisotura | 2021-10-28 |
| | | |||
| * | more complete (and accurate) CP15 setup for direct boot | Arisotura | 2021-10-28 |
| | | |||
| * | update copyright year and add missing GPL headers | RSDuck | 2021-03-12 |
| | | |||
| * | remove some UB | RSDuck | 2020-09-04 |
| | | | | | | | | - savestates used to read a four bytes from a single byte value - a few unassigned variables - some other things - also make the ROR macro an inline function | ||
| * | subtract cycles after checking IRQ and Halt | RSDuck | 2020-07-27 |
| | | | | | also switch back to adding to ARM::Cycles instead of subtracting from them | ||
| * | fix build with JIT disabled | RSDuck | 2020-07-25 |
| | | | | | fixes #675 and #674 | ||
| * | reconcile DSi and JIT, fastmem for x64 and Windows | RSDuck | 2020-06-30 |
| | | |||
| * | first steps in bringing over the JIT refactor/fastmem | RSDuck | 2020-06-16 |
| | | |||
| * | rewrite JIT memory emulation | RSDuck | 2020-06-16 |
| | | |||
| * | implement block linking + some refactoring | RSDuck | 2020-06-16 |
| | | | | | currently only supported for x64 | ||
| * | include more information in DataRegion | RSDuck | 2020-06-16 |
| | | |||
| * | move ARM64 JIT backend here | RSDuck | 2020-06-16 |
| | | |||
| * | integrate changes from ARM64 backend and more | RSDuck | 2020-06-16 |
| | | | | | | | | | | - better handle LDM/STM in reg alloc - unify Halted and IRQ in anticipation for branch inlining - literal optimisations can be disabled in gui - jit blocks follow simple returns - fix idle loop detection - break jit blocks on IRQ (fixes saving in Pokemon White) | ||
| * | new block cache and much more... | RSDuck | 2020-06-16 |
| | | | | | | | | | | - more reliable code invalidation detection - blocks aren't stopped at any branch, but are being followed if possible to get larger blocks - idle loop recognition - optimised literal loads, load/store cycle counting and loads/stores from constant addresses | ||
| * | abandon pipelining on jit | RSDuck | 2020-06-16 |
| | | | | | | fixes Golden Sun Dawn this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state. | ||
| * | jit: add compile option | RSDuck | 2020-06-16 |
| | | |||
| * | jit: make everything configurable | RSDuck | 2020-06-16 |
| | | |||
| * | make it able to switch between DS and DSi modes | Arisotura | 2020-06-01 |
| | | |||
| * | Merge commit '4b57416552ec2fa95216e2b044559f215723bf70' into melonDSi | Arisotura | 2020-05-30 |
| |\ | |||
| | * | update copyright years | Arisotura | 2020-02-14 |
| | | | |||
| * | | merge moar | Arisotura | 2020-05-30 |
| |\| | |||
| | * | smarter CP15 PU region updates. disable some useless logging. | Arisotura | 2019-10-21 |
| | | | | | | | | | fixes #528 | ||
| * | | melonDSi: skeleton in place | Arisotura | 2019-06-15 |
| |/ | |||
| * | fasterer IRQ check. clean up code. | Arisotura | 2019-06-08 |
| | | |||
| * | also, update copyright name | Arisotura | 2019-01-22 |
| | | |||
| * | redesign main emu loop to use timestamps instead of being a trainwreck | StapleButter | 2019-01-05 |
| | | | | | | | | | * cleaner code * faster in some cases * more accurate (on-demand compensation for timers and GPU) * less prone to desyncs * overall betterer | ||
| * | add PoC ARM9 instruction cache logic. not actually in use, but it's there as ↵ | StapleButter | 2019-01-04 |
| | | | | | a reference (and if we ever need it). | ||
| * | more sensible cache timings | StapleButter | 2018-12-11 |
| | | | | | (still a big fat hack) | ||
| * | take it somewhere. | StapleButter | 2018-12-09 |
| | | | | | still need to speed it up a tad. | ||
| * | make this other branch where we're going to actually make it usable | StapleButter | 2018-12-08 |
| | | | | | but it'll be a gross hack | ||
| * | begin PU work | StapleButter | 2018-12-04 |
| | | |||
| * | begin work on general timing renovation. way shitty because it behaves as if ↵ | StapleButter | 2018-12-04 |
| | | | | | caches were off, so everything will be slow as shit. | ||
| * | make the ARM clock shift configurable. nothing fancy there, just paving the ↵ | StapleButter | 2018-11-07 |
| | | | | | way for DSi support later. | ||
| * | 3D: keep the rasterizer from accidentally going out of bounds when given ↵ | StapleButter | 2018-11-04 |
| | | | | | | | | | very flat X-major edge slopes. this, by a fucking shitshow of butterfly effect, ends up fixing #234. technically, the rasterizer was going out of bounds, which, under certain circumstances, caused interpolation to shit itself and generate Z values that were out of range (but still ended up in the zbuffer). sometimes those values ended up negative, which caused these glitches when polygons had to be drawn over those. about fucking time. | ||
| * | savestate shito: fix compile errors. | StapleButter | 2018-10-18 |
| | | | | | still far from being finished, so avoid using unless you want to spawn blackholes or some pretty bad shit. | ||
| * | start implementing actual shito | StapleButter | 2018-09-15 |
| | | | | | (also looks like the test bench in libui_sdl/main.cpp snuck in with the copyright update. shit) | ||
| * | fixor copyright years. | StapleButter | 2018-09-15 |
| | | |||
| * | fix QADD/QSUB/QDADD/QDSUB, those would write their result to the wrong register. | StapleButter | 2017-06-13 |
| | | | | | also make them ARM9-only. | ||
| * | add support for polygon ID and conditional depth update for translucent pixels | StapleButter | 2017-04-22 |
| | | |||
| * | hopefully fix the DMA bug without breaking everything this time. | StapleButter | 2017-04-13 |
| | | |||
| * | reorganize repo, move shit around | StapleButter | 2017-03-16 |