aboutsummaryrefslogtreecommitdiff
path: root/src/ARM.cpp
Commit message (Collapse)AuthorAge
* make things function atleast somewhatArisotura2020-10-26
| | | | no pciture is being actually sent yet
* messin' aroundArisotura2020-09-08
|
* check IRQ first then Idle loopRSDuck2020-07-28
| | | | apparently I put it this way for a reason
* subtract cycles after checking IRQ and HaltRSDuck2020-07-27
| | | | also switch back to adding to ARM::Cycles instead of subtracting from them
* fix build with JIT disabledRSDuck2020-07-25
| | | | fixes #675 and #674
* reconcile DSi and JIT, fastmem for x64 and WindowsRSDuck2020-06-30
|
* first steps in bringing over the JIT refactor/fastmemRSDuck2020-06-16
|
* rewrite JIT memory emulationRSDuck2020-06-16
|
* fix build with JIT disabled and set default JIT maxblock size to 32RSDuck2020-06-16
|
* implement block linking + some refactoringRSDuck2020-06-16
| | | | currently only supported for x64
* remove debug leftoversRSDuck2020-06-16
|
* improve nop handling and proper behaviour for LDM^RSDuck2020-06-16
| | | | fixes dslinux
* make savestates 100% compatible againRSDuck2020-06-16
|
* integrate changes from ARM64 backend and moreRSDuck2020-06-16
| | | | | | | | | - better handle LDM/STM in reg alloc - unify Halted and IRQ in anticipation for branch inlining - literal optimisations can be disabled in gui - jit blocks follow simple returns - fix idle loop detection - break jit blocks on IRQ (fixes saving in Pokemon White)
* new block cache and much more...RSDuck2020-06-16
| | | | | | | | | - more reliable code invalidation detection - blocks aren't stopped at any branch, but are being followed if possible to get larger blocks - idle loop recognition - optimised literal loads, load/store cycle counting and loads/stores from constant addresses
* abandon pipelining on jitRSDuck2020-06-16
| | | | | fixes Golden Sun Dawn this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state.
* fix uninitialised memory mappingRSDuck2020-06-16
|
* jit: decrease blockcache AddrMapping size for ARM9RSDuck2020-06-16
|
* jit: add compile optionRSDuck2020-06-16
|
* jit: make everything configurableRSDuck2020-06-16
|
* jit: LDM/STM finally(!) working + MUL, MLA and CLZRSDuck2020-06-16
|
* jit: branch instructionsRSDuck2020-06-16
|
* JIT: most mem instructions workingRSDuck2020-06-16
| | | | + branching
* JIT: implemented most ALU instructionsRSDuck2020-06-16
|
* JIT: baseRSDuck2020-06-16
| | | | all instructions are interpreted
* make it able to switch between DS and DSi modesArisotura2020-06-01
|
* Merge commit '4b57416552ec2fa95216e2b044559f215723bf70' into melonDSiArisotura2020-05-30
|\
| * detect whether we are running the gameArisotura2020-02-24
| |
| * * add support for a bunch of codes (all of them minus the loop shit, really)Arisotura2020-02-14
| | | | | | | | * hook it betterer so it doesn't asplode
| * update copyright yearsArisotura2020-02-14
| |
* | add AES, fix a bunch of bugsArisotura2019-06-19
| | | | | | | | we're getting an error screen! wee
* | y'know, actually running the DMA units might yield better results.Arisotura2019-06-18
| |
* | fix fucking ass-stupid bug with new-WRAM handlingArisotura2019-06-16
| |
* | get it to do more interesting thingsArisotura2019-06-15
| |
* | add I2C shitoArisotura2019-06-15
|/
* pftArisotura2019-06-10
|
* fasterer BG/OBJ VRAM readsArisotura2019-06-09
|
* fasterer IRQ check. clean up code.Arisotura2019-06-08
|
* draft API for OpenGL shito in libuiArisotura2019-03-31
|
* move platform specific config to platform specif ffile ayyyyyyyyyyygfghj;,gnxbfArisotura2019-03-15
|
* start work on non-direct mode. reply to DHCP discover frame.Arisotura2019-02-23
|
* also, update copyright nameArisotura2019-01-22
|
* redesign main emu loop to use timestamps instead of being a trainwreckStapleButter2019-01-05
| | | | | | | | * cleaner code * faster in some cases * more accurate (on-demand compensation for timers and GPU) * less prone to desyncs * overall betterer
* add PoC ARM9 instruction cache logic. not actually in use, but it's there as ↵StapleButter2019-01-04
| | | | a reference (and if we ever need it).
* add missing shit to savestates. bump the version up.StapleButter2018-12-11
|
* more sensible cache timingsStapleButter2018-12-11
| | | | (still a big fat hack)
* add back faster prefetch for ARM9StapleButter2018-12-11
|
* finish the work on the main loop. finally fix all cases of desync I could ↵StapleButter2018-12-11
| | | | find. also add #ifdef'd debug code to check for desyncs.
* temp commitStapleButter2018-12-11
| | | | almost done killing ARM9/ARM7 desync, f
* fix bugsStapleButter2018-12-09
| | | | still kinda shitty tho. like, we lost enough timer accuracy to have visible effects (aging cart tests that fail, FMVs that play too slow, etc)