| Commit message (Expand) | Author | Age | ||
|---|---|---|---|---|
| ... | ||||
| * | more instructions. shared WRAM. | StapleButter | 2016-12-03 | |
| * | moar instructions and shit implemented | StapleButter | 2016-12-03 | |
| * | less amnesia! ITCM, DTCM, corresponding CP15 support | StapleButter | 2016-12-03 | |
| * | more crap implemented! | StapleButter | 2016-12-03 | |
| * | amnesia is over | StapleButter | 2016-12-03 | |
| * | more instructions. some handling of CPU mode switching. | StapleButter | 2016-12-03 | |
| * | moar shit | StapleButter | 2016-12-03 | |
| * | ARM ALU is done with. as well as other shit. | StapleButter | 2016-12-03 | |
| * | add MSR/MRS. also fix misc error with LDR ROR effect. | StapleButter | 2016-12-03 | |
| * | implement LDR/STR/LDRB/STRB. | StapleButter | 2016-12-03 | |
| * | more shit! some start of ALU emulation | StapleButter | 2016-11-25 | |
| * | well, adding shit. laying out the base for the interpreter. really dirty code. | StapleButter | 2016-11-24 | |
| * | hey look, more crap | StapleButter | 2016-11-03 | |
| * | add more crap | StapleButter | 2016-05-16 | |
| * | first real commit, some shit is in | StapleButter | 2016-05-16 | |
| * | Initial commit | StapleButter | 2016-05-16 | |