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* Make it buildable on aarch64RSDuck2020-07-23
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* for some reason tabs and spaces were mixedRSDuck2020-07-23
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* SPU: delay channel start until whenever it can actually start. fixes maxmod ↵Arisotura2020-07-23
| | | | interpolated mode.
* another tryRSDuck2020-07-09
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* attempt at fixing aarch64 linux yet againRSDuck2020-07-08
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* fix for fastmem when pc is used as immediateRSDuck2020-07-08
| | | | and (hopefully) make SIGSEGV handler work for aarch64 linux
* misc JIT changesRSDuck2020-07-08
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* make linux work and fix a few bugsRSDuck2020-07-04
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* Merge pull request #667 from Arisotura/generic_jitArisotura2020-07-01
|\ | | | | merge jit
| * reconcile DSi and JIT, fastmem for x64 and WindowsRSDuck2020-06-30
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| * make literal optimisation work againRSDuck2020-06-16
| | | | | | | | enable single register block load/store optimisations for x64 aswell
| * first steps in bringing over the JIT refactor/fastmemRSDuck2020-06-16
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| * fix inlined IO register accessRSDuck2020-06-16
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| * Merge branch 'generic_jit' of https://github.com/Arisotura/melonDS into ↵RSDuck2020-06-16
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| | * allow allocating caller saved regs on windowsRSDuck2020-06-16
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| | * use instr hash as key for restore candidatesRSDuck2020-06-16
| | | | | | | | | | | | makes Golden Sun burn a little slower through the JIT memory
| | * allow allocating caller saved registersRSDuck2020-06-16
| | | | | | | | | | | | currently system-v only
| | * rewrite JIT memory emulationRSDuck2020-06-16
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| | * fix regression from last commitRSDuck2020-06-16
| | | | | | | | | | | | also a small mistake with msr
| | * don't use param registers for ReadBanked/WriteBankedRSDuck2020-06-16
| | | | | | | | | | | | should fix linux build
| | * fix build with JIT disabled and set default JIT maxblock size to 32RSDuck2020-06-16
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| | * hopefully fix stack handling for linuxRSDuck2020-06-16
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| | * implement msr and mrs for the x64 JITRSDuck2020-06-16
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| | * compile UMULLs and some fixesRSDuck2020-06-16
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| | * implement block linking + some refactoringRSDuck2020-06-16
| | | | | | | | | | | | currently only supported for x64
| | * include more information in DataRegionRSDuck2020-06-16
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| | * arm64 fix itcm invalidation and ldm^/stm^RSDuck2020-06-16
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| | * preparations for block linkingRSDuck2020-06-16
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| | * this mistake was phenomally stupidRSDuck2020-06-16
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| | * the time of good commit names is long goneRSDuck2020-06-16
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| | * git played a prank on me haha very funnyRSDuck2020-06-16
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| | * this it should workRSDuck2020-06-16
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| | * fixup for aarch64 JITRSDuck2020-06-16
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| | * fix LDM usermode for aarch64 as wellRSDuck2020-06-16
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| | * re add error for unsupported JIT platformsRSDuck2020-06-16
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| | * apply fixes for aarch64 linux by @nadiaholmquistRSDuck2020-06-16
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| | * move ARM64 JIT backend hereRSDuck2020-06-16
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| | * remove debug leftoversRSDuck2020-06-16
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| | * improve nop handling and proper behaviour for LDM^RSDuck2020-06-16
| | | | | | | | | | | | fixes dslinux
| | * disable literal optimations in DTCMRSDuck2020-06-16
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| | * make savestates 100% compatible againRSDuck2020-06-16
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| | * make literal optimisation more reliableRSDuck2020-06-16
| | | | | | | | | | | | fixes spanish Pokemon HeartGold
| | * fix config key for jit literal optimisationsRSDuck2020-06-16
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| | * integrate changes from ARM64 backend and moreRSDuck2020-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | - better handle LDM/STM in reg alloc - unify Halted and IRQ in anticipation for branch inlining - literal optimisations can be disabled in gui - jit blocks follow simple returns - fix idle loop detection - break jit blocks on IRQ (fixes saving in Pokemon White)
| | * decrease jit block cache address granularityRSDuck2020-06-16
| | | | | | | | | | | | | | | | | | | | | fixes Dragon Quest IX move code with side effects out of assert, fixes release build (thanks to m4wx for this one) also remove some leftovers of jit pipelining
| | * remove leftover debug codeRSDuck2020-06-16
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| | * new block cache and much more...RSDuck2020-06-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | - more reliable code invalidation detection - blocks aren't stopped at any branch, but are being followed if possible to get larger blocks - idle loop recognition - optimised literal loads, load/store cycle counting and loads/stores from constant addresses
| | * load register only if neededRSDuck2020-06-16
| | | | | | | | | | | | | | | - do thumb bl long merge in the first step - preparations for better branch jitting
| | * more fixes for flag optimisationRSDuck2020-06-16
| | | | | | | | | | | | + small cycle counting optimisation
| | * remove debug printingRSDuck2020-06-16
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