diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/DSi.cpp | 37 | ||||
| -rw-r--r-- | src/DSi_DSP.cpp | 20 | ||||
| -rw-r--r-- | src/DSi_DSP.h | 5 |
3 files changed, 56 insertions, 6 deletions
diff --git a/src/DSi.cpp b/src/DSi.cpp index 638ecdc..83f1b09 100644 --- a/src/DSi.cpp +++ b/src/DSi.cpp @@ -2638,6 +2638,9 @@ u8 ARM7IORead8(u32 addr) case 0x04004D06: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 48) & 0xFF; case 0x04004D07: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID >> 56; case 0x04004D08: return 0; + + case 0x4004700: return DSi_DSP::SNDExCnt; + case 0x4004701: return DSi_DSP::SNDExCnt >> 8; } return NDS::ARM7IORead8(addr); @@ -2670,6 +2673,8 @@ u16 ARM7IORead16(u32 addr) case 0x04004D04: if (SCFG_BIOS & (1<<10)) return 0; return (ConsoleID >> 32) & 0xFFFF; case 0x04004D06: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID >> 48; case 0x04004D08: return 0; + + case 0x4004700: return DSi_DSP::SNDExCnt; } if (addr >= 0x04004800 && addr < 0x04004A00) @@ -2741,6 +2746,10 @@ u32 ARM7IORead32(u32 addr) case 0x04004D00: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID & 0xFFFFFFFF; case 0x04004D04: if (SCFG_BIOS & (1<<10)) return 0; return ConsoleID >> 32; case 0x04004D08: return 0; + + case 0x4004700: + printf("32-Bit SNDExCnt read? %08X\n", NDS::ARM7->R[15]); + return DSi_DSP::SNDExCnt; } if (addr >= 0x04004800 && addr < 0x04004A00) @@ -2788,6 +2797,13 @@ void ARM7IOWrite8(u32 addr, u8 val) case 0x04004500: DSi_I2C::WriteData(val); return; case 0x04004501: DSi_I2C::WriteCnt(val); return; + + case 0x4004700: + DSi_DSP::WriteSNDExCnt((u16)val | (DSi_DSP::SNDExCnt & 0xFF00)); + return; + case 0x4004701: + DSi_DSP::WriteSNDExCnt(((u16)val << 8) | (DSi_DSP::SNDExCnt & 0x00FF)); + return; } return NDS::ARM7IOWrite8(addr, val); @@ -2819,11 +2835,17 @@ void ARM7IOWrite16(u32 addr, u16 val) case 0x04004062: if (!(SCFG_EXT[1] & (1 << 31))) /* no access to SCFG Registers if disabled*/ return; - u32 tmp = MBK[0][8]; - tmp &= ~(0xffff << ((addr % 4) * 8)); - tmp |= (val << ((addr % 4) * 8)); - MBK[0][8] = tmp & 0x00FFFF0F; - MBK[1][8] = MBK[0][8]; + { + u32 tmp = MBK[0][8]; + tmp &= ~(0xffff << ((addr % 4) * 8)); + tmp |= (val << ((addr % 4) * 8)); + MBK[0][8] = tmp & 0x00FFFF0F; + MBK[1][8] = MBK[0][8]; + } + return; + + case 0x4004700: + DSi_DSP::WriteSNDExCnt(val); return; } @@ -2924,6 +2946,11 @@ void ARM7IOWrite32(u32 addr, u32 val) case 0x04004400: DSi_AES::WriteCnt(val); return; case 0x04004404: DSi_AES::WriteBlkCnt(val); return; case 0x04004408: DSi_AES::WriteInputFIFO(val); return; + + case 0x4004700: + printf("32-Bit SNDExCnt write? %08X %08X\n", val, NDS::ARM7->R[15]); + DSi_DSP::WriteSNDExCnt(val); + return; } if (addr >= 0x04004420 && addr < 0x04004430) diff --git a/src/DSi_DSP.cpp b/src/DSi_DSP.cpp index c889aff..0525366 100644 --- a/src/DSi_DSP.cpp +++ b/src/DSi_DSP.cpp @@ -27,6 +27,9 @@ namespace DSi_DSP { +// not sure whether to not rather put it somewhere else +u16 SNDExCnt; + Teakra::Teakra* TeakraCore; bool SCFG_RST; @@ -151,6 +154,8 @@ void Reset() TeakraCore->Reset(); NDS::CancelEvent(NDS::Event_DSi_DSP); + + SNDExCnt = 0; } bool IsRstReleased() @@ -548,6 +553,21 @@ void Write32(u32 addr, u32 val) Write16(addr, val & 0xFFFF); } +void WriteSNDExCnt(u16 val) +{ + // it can be written even in NDS mode + + // mic frequency can only be changed if it was disabled + // before the write + if (SNDExCnt & 0x8000) + { + val &= ~0x2000; + val |= SNDExCnt & 0x2000; + } + + SNDExCnt = val & 0xE00F; +} + void Run(u32 cycles) { if (!IsDSPCoreEnabled()) diff --git a/src/DSi_DSP.h b/src/DSi_DSP.h index ccf1161..5d3427f 100644 --- a/src/DSi_DSP.h +++ b/src/DSi_DSP.h @@ -24,11 +24,12 @@ // TODO: for actual sound output // * audio callbacks -// * SNDEXCNT namespace DSi_DSP { +extern u16 SNDExCnt; + extern u16 DSP_PDATA; extern u16 DSP_PADR; extern u16 DSP_PCFG; @@ -65,6 +66,8 @@ void Write16(u32 addr, u16 val); u32 Read32(u32 addr); void Write32(u32 addr, u32 val); +void WriteSNDExCnt(u16 val); + // NOTE: checks SCFG_CLK9 void Run(u32 cycles); |