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Diffstat (limited to 'src/CP15.cpp')
-rw-r--r--src/CP15.cpp28
1 files changed, 14 insertions, 14 deletions
diff --git a/src/CP15.cpp b/src/CP15.cpp
index af23da3..7cea845 100644
--- a/src/CP15.cpp
+++ b/src/CP15.cpp
@@ -124,7 +124,7 @@ void ARMv5::UpdateDTCMSetting()
if (newDTCMBase != DTCMBase || newDTCMMask != DTCMMask)
{
- JIT.Memory.RemapDTCM(newDTCMBase, newDTCMSize);
+ NDS.JIT.Memory.RemapDTCM(newDTCMBase, newDTCMSize);
DTCMBase = newDTCMBase;
DTCMMask = newDTCMMask;
}
@@ -295,7 +295,7 @@ void ARMv5::UpdateRegionTimings(u32 addrstart, u32 addrend)
for (u32 i = addrstart; i < addrend; i++)
{
u8 pu = PU_Map[i];
- u8* bustimings = NDS::ARM9MemTimings[i >> 2];
+ u8* bustimings = NDS.ARM9MemTimings[i >> 2];
if (pu & 0x40)
{
@@ -303,7 +303,7 @@ void ARMv5::UpdateRegionTimings(u32 addrstart, u32 addrend)
}
else
{
- MemTimings[i][0] = bustimings[2] << NDS::ARM9ClockShift;
+ MemTimings[i][0] = bustimings[2] << NDS.ARM9ClockShift;
}
if (pu & 0x10)
@@ -314,9 +314,9 @@ void ARMv5::UpdateRegionTimings(u32 addrstart, u32 addrend)
}
else
{
- MemTimings[i][1] = bustimings[0] << NDS::ARM9ClockShift;
- MemTimings[i][2] = bustimings[2] << NDS::ARM9ClockShift;
- MemTimings[i][3] = bustimings[3] << NDS::ARM9ClockShift;
+ MemTimings[i][1] = bustimings[0] << NDS.ARM9ClockShift;
+ MemTimings[i][2] = bustimings[2] << NDS.ARM9ClockShift;
+ MemTimings[i][3] = bustimings[3] << NDS.ARM9ClockShift;
}
}
}
@@ -388,14 +388,14 @@ void ARMv5::ICacheLookup(u32 addr)
else
{
for (int i = 0; i < 32; i+=4)
- *(u32*)&ptr[i] = NDS::ARM9Read32(addr+i);
+ *(u32*)&ptr[i] = NDS.ARM9Read32(addr+i);
}
ICacheTags[line] = tag;
// ouch :/
//printf("cache miss %08X: %d/%d\n", addr, NDS::ARM9MemTimings[addr >> 14][2], NDS::ARM9MemTimings[addr >> 14][3]);
- CodeCycles = (NDS::ARM9MemTimings[addr >> 14][2] + (NDS::ARM9MemTimings[addr >> 14][3] * 7)) << NDS::ARM9ClockShift;
+ CodeCycles = (NDS.ARM9MemTimings[addr >> 14][2] + (NDS.ARM9MemTimings[addr >> 14][3] * 7)) << NDS.ARM9ClockShift;
CurICacheLine = ptr;
}
@@ -923,7 +923,7 @@ void ARMv5::DataWrite8(u32 addr, u8 val)
{
DataCycles = 1;
*(u8*)&ITCM[addr & (ITCMPhysicalSize - 1)] = val;
- JIT.CheckAndInvalidate<0, ARMJIT_Memory::memregion_ITCM>(addr);
+ NDS.JIT.CheckAndInvalidate<0, ARMJIT_Memory::memregion_ITCM>(addr);
return;
}
if ((addr & DTCMMask) == DTCMBase)
@@ -953,7 +953,7 @@ void ARMv5::DataWrite16(u32 addr, u16 val)
{
DataCycles = 1;
*(u16*)&ITCM[addr & (ITCMPhysicalSize - 1)] = val;
- JIT.CheckAndInvalidate<0, ARMJIT_Memory::memregion_ITCM>(addr);
+ NDS.JIT.CheckAndInvalidate<0, ARMJIT_Memory::memregion_ITCM>(addr);
return;
}
if ((addr & DTCMMask) == DTCMBase)
@@ -983,7 +983,7 @@ void ARMv5::DataWrite32(u32 addr, u32 val)
{
DataCycles = 1;
*(u32*)&ITCM[addr & (ITCMPhysicalSize - 1)] = val;
- JIT.CheckAndInvalidate<0, ARMJIT_Memory::memregion_ITCM>(addr);
+ NDS.JIT.CheckAndInvalidate<0, ARMJIT_Memory::memregion_ITCM>(addr);
return;
}
if ((addr & DTCMMask) == DTCMBase)
@@ -1006,7 +1006,7 @@ void ARMv5::DataWrite32S(u32 addr, u32 val)
DataCycles += 1;
*(u32*)&ITCM[addr & (ITCMPhysicalSize - 1)] = val;
#ifdef JIT_ENABLED
- JIT.CheckAndInvalidate<0, ARMJIT_Memory::memregion_ITCM>(addr);
+ NDS.JIT.CheckAndInvalidate<0, ARMJIT_Memory::memregion_ITCM>(addr);
#endif
return;
}
@@ -1021,7 +1021,7 @@ void ARMv5::DataWrite32S(u32 addr, u32 val)
DataCycles += MemTimings[addr >> 12][3];
}
-void ARMv5::GetCodeMemRegion(u32 addr, NDS::MemRegion* region)
+void ARMv5::GetCodeMemRegion(u32 addr, MemRegion* region)
{
/*if (addr < ITCMSize)
{
@@ -1030,7 +1030,7 @@ void ARMv5::GetCodeMemRegion(u32 addr, NDS::MemRegion* region)
return;
}*/
- GetMemRegion(addr, false, &CodeMem);
+ NDS.ARM9GetMemRegion(addr, false, &CodeMem);
}
}