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-rw-r--r--src/ARMJIT_A64/ARMJIT_Compiler.cpp118
-rw-r--r--src/ARMJIT_A64/ARMJIT_Compiler.h6
-rw-r--r--src/ARMJIT_A64/ARMJIT_Linkage.s6
-rw-r--r--src/ARMJIT_A64/ARMJIT_LoadStore.cpp65
4 files changed, 126 insertions, 69 deletions
diff --git a/src/ARMJIT_A64/ARMJIT_Compiler.cpp b/src/ARMJIT_A64/ARMJIT_Compiler.cpp
index 62323ff..413c673 100644
--- a/src/ARMJIT_A64/ARMJIT_Compiler.cpp
+++ b/src/ARMJIT_A64/ARMJIT_Compiler.cpp
@@ -312,59 +312,93 @@ Compiler::Compiler()
RET();
}
- for (int num = 0; num < 2; num++)
+ for (int consoleType = 0; consoleType < 2; consoleType++)
{
- for (int size = 0; size < 3; size++)
+ for (int num = 0; num < 2; num++)
{
- for (int reg = 0; reg < 8; reg++)
+ for (int size = 0; size < 3; size++)
{
- ARM64Reg rdMapped = (ARM64Reg)(W19 + reg);
- PatchedStoreFuncs[num][size][reg] = GetRXPtr();
- if (num == 0)
+ for (int reg = 0; reg < 8; reg++)
{
- MOV(X1, RCPU);
- MOV(W2, rdMapped);
- }
- else
- {
- MOV(W1, rdMapped);
- }
- ABI_PushRegisters({30});
- switch ((8 << size) | num)
- {
- case 32: QuickCallFunction(X3, SlowWrite9<u32>); break;
- case 33: QuickCallFunction(X3, SlowWrite7<u32>); break;
- case 16: QuickCallFunction(X3, SlowWrite9<u16>); break;
- case 17: QuickCallFunction(X3, SlowWrite7<u16>); break;
- case 8: QuickCallFunction(X3, SlowWrite9<u8>); break;
- case 9: QuickCallFunction(X3, SlowWrite7<u8>); break;
- }
- ABI_PopRegisters({30});
- RET();
-
- for (int signextend = 0; signextend < 2; signextend++)
- {
- PatchedLoadFuncs[num][size][signextend][reg] = GetRXPtr();
+ ARM64Reg rdMapped = (ARM64Reg)(W19 + reg);
+ PatchedStoreFuncs[consoleType][num][size][reg] = GetRXPtr();
if (num == 0)
+ {
MOV(X1, RCPU);
+ MOV(W2, rdMapped);
+ }
+ else
+ {
+ MOV(W1, rdMapped);
+ }
ABI_PushRegisters({30});
- switch ((8 << size) | num)
+ if (consoleType == 0)
{
- case 32: QuickCallFunction(X3, SlowRead9<u32>); break;
- case 33: QuickCallFunction(X3, SlowRead7<u32>); break;
- case 16: QuickCallFunction(X3, SlowRead9<u16>); break;
- case 17: QuickCallFunction(X3, SlowRead7<u16>); break;
- case 8: QuickCallFunction(X3, SlowRead9<u8>); break;
- case 9: QuickCallFunction(X3, SlowRead7<u8>); break;
+ switch ((8 << size) | num)
+ {
+ case 32: QuickCallFunction(X3, SlowWrite9<u32, 0>); break;
+ case 33: QuickCallFunction(X3, SlowWrite7<u32, 0>); break;
+ case 16: QuickCallFunction(X3, SlowWrite9<u16, 0>); break;
+ case 17: QuickCallFunction(X3, SlowWrite7<u16, 0>); break;
+ case 8: QuickCallFunction(X3, SlowWrite9<u8, 0>); break;
+ case 9: QuickCallFunction(X3, SlowWrite7<u8, 0>); break;
+ }
}
- ABI_PopRegisters({30});
- if (size == 32)
- MOV(rdMapped, W0);
- else if (signextend)
- SBFX(rdMapped, W0, 0, 8 << size);
else
- UBFX(rdMapped, W0, 0, 8 << size);
+ {
+ switch ((8 << size) | num)
+ {
+ case 32: QuickCallFunction(X3, SlowWrite9<u32, 1>); break;
+ case 33: QuickCallFunction(X3, SlowWrite7<u32, 1>); break;
+ case 16: QuickCallFunction(X3, SlowWrite9<u16, 1>); break;
+ case 17: QuickCallFunction(X3, SlowWrite7<u16, 1>); break;
+ case 8: QuickCallFunction(X3, SlowWrite9<u8, 1>); break;
+ case 9: QuickCallFunction(X3, SlowWrite7<u8, 1>); break;
+ }
+ }
+
+ ABI_PopRegisters({30});
RET();
+
+ for (int signextend = 0; signextend < 2; signextend++)
+ {
+ PatchedLoadFuncs[consoleType][num][size][signextend][reg] = GetRXPtr();
+ if (num == 0)
+ MOV(X1, RCPU);
+ ABI_PushRegisters({30});
+ if (consoleType == 0)
+ {
+ switch ((8 << size) | num)
+ {
+ case 32: QuickCallFunction(X3, SlowRead9<u32, 0>); break;
+ case 33: QuickCallFunction(X3, SlowRead7<u32, 0>); break;
+ case 16: QuickCallFunction(X3, SlowRead9<u16, 0>); break;
+ case 17: QuickCallFunction(X3, SlowRead7<u16, 0>); break;
+ case 8: QuickCallFunction(X3, SlowRead9<u8, 0>); break;
+ case 9: QuickCallFunction(X3, SlowRead7<u8, 0>); break;
+ }
+ }
+ else
+ {
+ switch ((8 << size) | num)
+ {
+ case 32: QuickCallFunction(X3, SlowRead9<u32, 1>); break;
+ case 33: QuickCallFunction(X3, SlowRead7<u32, 1>); break;
+ case 16: QuickCallFunction(X3, SlowRead9<u16, 1>); break;
+ case 17: QuickCallFunction(X3, SlowRead7<u16, 1>); break;
+ case 8: QuickCallFunction(X3, SlowRead9<u8, 1>); break;
+ case 9: QuickCallFunction(X3, SlowRead7<u8, 1>); break;
+ }
+ }
+ ABI_PopRegisters({30});
+ if (size == 32)
+ MOV(rdMapped, W0);
+ else if (signextend)
+ SBFX(rdMapped, W0, 0, 8 << size);
+ else
+ UBFX(rdMapped, W0, 0, 8 << size);
+ RET();
+ }
}
}
}
diff --git a/src/ARMJIT_A64/ARMJIT_Compiler.h b/src/ARMJIT_A64/ARMJIT_Compiler.h
index e4ffc63..0e7d54c 100644
--- a/src/ARMJIT_A64/ARMJIT_Compiler.h
+++ b/src/ARMJIT_A64/ARMJIT_Compiler.h
@@ -247,9 +247,9 @@ public:
std::unordered_map<ptrdiff_t, LoadStorePatch> LoadStorePatches;
- // [Num][Size][Sign Extend][Output register]
- void* PatchedLoadFuncs[2][3][2][8];
- void* PatchedStoreFuncs[2][3][8];
+ // [Console Type][Num][Size][Sign Extend][Output register]
+ void* PatchedLoadFuncs[2][2][3][2][8];
+ void* PatchedStoreFuncs[2][2][3][8];
RegisterCache<Compiler, Arm64Gen::ARM64Reg> RegCache;
diff --git a/src/ARMJIT_A64/ARMJIT_Linkage.s b/src/ARMJIT_A64/ARMJIT_Linkage.s
index 536a478..7886315 100644
--- a/src/ARMJIT_A64/ARMJIT_Linkage.s
+++ b/src/ARMJIT_A64/ARMJIT_Linkage.s
@@ -2,9 +2,9 @@
.text
-#define RCPSR W27
-#define RCycles W28
-#define RCPU X29
+#define RCPSR w27
+#define RCycles w28
+#define RCPU x29
.p2align 4,,15
diff --git a/src/ARMJIT_A64/ARMJIT_LoadStore.cpp b/src/ARMJIT_A64/ARMJIT_LoadStore.cpp
index bdd9f43..6aad0eb 100644
--- a/src/ARMJIT_A64/ARMJIT_LoadStore.cpp
+++ b/src/ARMJIT_A64/ARMJIT_LoadStore.cpp
@@ -174,8 +174,8 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
LoadStorePatch patch;
patch.PatchFunc = flags & memop_Store
- ? PatchedStoreFuncs[Num][__builtin_ctz(size) - 3][rdMapped - W19]
- : PatchedLoadFuncs[Num][__builtin_ctz(size) - 3][!!(flags & memop_SignExtend)][rdMapped - W19];
+ ? PatchedStoreFuncs[NDS::ConsoleType][Num][__builtin_ctz(size) - 3][rdMapped - W19]
+ : PatchedLoadFuncs[NDS::ConsoleType][Num][__builtin_ctz(size) - 3][!!(flags & memop_SignExtend)][rdMapped - W19];
assert(rdMapped - W19 >= 0 && rdMapped - W19 < 8);
MOVP2R(X7, Num == 0 ? ARMJIT_Memory::FastMem9Start : ARMJIT_Memory::FastMem7Start);
@@ -241,20 +241,26 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
if (flags & memop_Store)
{
MOV(W2, rdMapped);
- switch (size)
+ switch (size | NDS::ConsoleType)
{
- case 32: QuickCallFunction(X3, SlowWrite9<u32>); break;
- case 16: QuickCallFunction(X3, SlowWrite9<u16>); break;
- case 8: QuickCallFunction(X3, SlowWrite9<u8>); break;
+ case 32: QuickCallFunction(X3, SlowWrite9<u32, 0>); break;
+ case 33: QuickCallFunction(X3, SlowWrite9<u32, 1>); break;
+ case 16: QuickCallFunction(X3, SlowWrite9<u16, 0>); break;
+ case 17: QuickCallFunction(X3, SlowWrite9<u16, 1>); break;
+ case 8: QuickCallFunction(X3, SlowWrite9<u8, 0>); break;
+ case 9: QuickCallFunction(X3, SlowWrite9<u8, 1>); break;
}
}
else
{
switch (size)
{
- case 32: QuickCallFunction(X3, SlowRead9<u32>); break;
- case 16: QuickCallFunction(X3, SlowRead9<u16>); break;
- case 8: QuickCallFunction(X3, SlowRead9<u8>); break;
+ case 32: QuickCallFunction(X3, SlowRead9<u32, 0>); break;
+ case 33: QuickCallFunction(X3, SlowRead9<u32, 1>); break;
+ case 16: QuickCallFunction(X3, SlowRead9<u16, 0>); break;
+ case 17: QuickCallFunction(X3, SlowRead9<u16, 0>); break;
+ case 8: QuickCallFunction(X3, SlowRead9<u8, 0>); break;
+ case 9: QuickCallFunction(X3, SlowRead9<u8, 1>); break;
}
}
}
@@ -265,18 +271,24 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
MOV(W1, rdMapped);
switch (size)
{
- case 32: QuickCallFunction(X3, SlowWrite7<u32>); break;
- case 16: QuickCallFunction(X3, SlowWrite7<u16>); break;
- case 8: QuickCallFunction(X3, SlowWrite7<u8>); break;
+ case 32: QuickCallFunction(X3, SlowWrite7<u32, 0>); break;
+ case 33: QuickCallFunction(X3, SlowWrite7<u32, 1>); break;
+ case 16: QuickCallFunction(X3, SlowWrite7<u16, 0>); break;
+ case 17: QuickCallFunction(X3, SlowWrite7<u16, 1>); break;
+ case 8: QuickCallFunction(X3, SlowWrite7<u8, 0>); break;
+ case 9: QuickCallFunction(X3, SlowWrite7<u8, 1>); break;
}
}
else
{
switch (size)
{
- case 32: QuickCallFunction(X3, SlowRead7<u32>); break;
- case 16: QuickCallFunction(X3, SlowRead7<u16>); break;
- case 8: QuickCallFunction(X3, SlowRead7<u8>); break;
+ case 32: QuickCallFunction(X3, SlowRead7<u32, 0>); break;
+ case 33: QuickCallFunction(X3, SlowRead7<u32, 1>); break;
+ case 16: QuickCallFunction(X3, SlowRead7<u16, 0>); break;
+ case 17: QuickCallFunction(X3, SlowRead7<u16, 1>); break;
+ case 8: QuickCallFunction(X3, SlowRead7<u8, 0>); break;
+ case 9: QuickCallFunction(X3, SlowRead7<u8, 1>); break;
}
}
}
@@ -465,15 +477,25 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
if (decrement)
{
- SUB(W0, MapReg(rn), regsCount * 4);
- ANDI2R(W0, W0, ~3);
- preinc ^= true;
+ s32 offset = -regsCount * 4 + (preinc ? 0 : 4);
+ if (offset)
+ {
+ ADDI2R(W0, MapReg(rn), offset);
+ ANDI2R(W0, W0, ~3);
+ }
+ else
+ {
+ ANDI2R(W0, MapReg(rn), ~3);
+ }
}
else
{
ANDI2R(W0, MapReg(rn), ~3);
+ if (preinc)
+ ADD(W0, W0, 4);
}
+ u8* patchFunc;
if (compileFastPath)
{
ptrdiff_t fastPathStart = GetCodeOffset();
@@ -482,7 +504,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
MOVP2R(X1, Num == 0 ? ARMJIT_Memory::FastMem9Start : ARMJIT_Memory::FastMem7Start);
ADD(X1, X1, X0);
- u32 offset = preinc ? 4 : 0;
+ u32 offset = 0;
BitSet16::Iterator it = regs.begin();
u32 i = 0;
@@ -545,7 +567,8 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
LoadStorePatch patch;
patch.PatchSize = GetCodeOffset() - fastPathStart;
SwapCodeRegion();
- patch.PatchFunc = GetRXPtr();
+ patchFunc = (u8*)GetRXPtr();
+ patch.PatchFunc = patchFunc;
for (i = 0; i < regsCount; i++)
{
patch.PatchOffset = fastPathStart - loadStoreOffsets[i];
@@ -705,7 +728,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
ABI_PopRegisters({30});
RET();
- FlushIcacheSection((u8*)patch.PatchFunc, (u8*)GetRXPtr());
+ FlushIcacheSection(patchFunc, (u8*)GetRXPtr());
SwapCodeRegion();
}